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Searched refs:REG_BIT8 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_cx0_phy_regs.h229 #define C10_PLL0_SSC_EN REG_BIT8(0)
230 #define C10_PLL0_DIVCLK_EN REG_BIT8(1)
231 #define C10_PLL0_DIV5CLK_EN REG_BIT8(2)
232 #define C10_PLL0_WORDDIV2_EN REG_BIT8(3)
233 #define C10_PLL0_FRACEN REG_BIT8(4)
234 #define C10_PLL0_PMIX_EN REG_BIT8(5)
239 #define C10_PLL8_SSC_UP_SPREAD REG_BIT8(5)
250 #define C10_PLL16_ANA_CPINTGS_L REG_BIT8(7)
275 #define PHY_C10_VDR_OVRD_TX1 REG_BIT8(0)
276 #define PHY_C10_VDR_OVRD_TX2 REG_BIT8(2)
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/drivers/gpu/drm/i915/
A Di915_reg_defs.h24 #define REG_BIT8(n) BIT_U8(n) macro

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