Searched refs:REG_GENMASK16 (Results 1 – 2 of 2) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| A D | intel_cx0_phy_regs.h | 334 #define C20_PHY_TX_MISC_MASK REG_GENMASK16(7, 0)
340 #define C20_PHY_TX_TERM_CTL_MASK REG_GENMASK16(15, 13)
391 #define MPLLB_ANA_FREQ_VCO_MASK REG_GENMASK16(15, 14)
394 #define MPLL_DIV_MULTIPLIER_MASK REG_GENMASK16(7, 0)
398 #define CAL_DAC_CODE_MASK REG_GENMASK16(14, 10)
402 #define CP_INT_GS_MASK REG_GENMASK16(6, 0)
406 #define CP_PROP_GS_MASK REG_GENMASK16(13, 7)
410 #define CP_INT_MASK REG_GENMASK16(6, 0)
414 #define CP_PROP_MASK REG_GENMASK16(13, 7)
418 #define V2I_MASK REG_GENMASK16(15, 14)
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| /drivers/gpu/drm/i915/ |
| A D | i915_reg_defs.h | 18 #define REG_GENMASK16(high, low) GENMASK_U16(high, low) macro
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