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Searched refs:REG_GENMASK64 (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/i915/
A Dintel_mchbar_regs.h231 #define SSKPD_NEW_WM0_MASK_HSW REG_GENMASK64(63, 56)
232 #define SSKPD_WM4_MASK_HSW REG_GENMASK64(40, 32)
233 #define SSKPD_WM3_MASK_HSW REG_GENMASK64(28, 20)
234 #define SSKPD_WM2_MASK_HSW REG_GENMASK64(19, 12)
235 #define SSKPD_WM1_MASK_HSW REG_GENMASK64(11, 4)
236 #define SSKPD_OLD_WM0_MASK_HSW REG_GENMASK64(3, 0)
A Di915_reg_defs.h17 #define REG_GENMASK64(high, low) GENMASK_U64(high, low) macro
A Di915_reg.h1218 #define GEN6_BDSM_MASK REG_GENMASK64(31, 20)
1219 #define GEN11_BDSM_MASK REG_GENMASK64(63, 20)
/drivers/gpu/drm/xe/regs/
A Dxe_pmt.h15 #define ENERGY_PKG REG_GENMASK64(31, 0)
16 #define ENERGY_CARD REG_GENMASK64(63, 32)
A Dxe_regs.h36 #define BDSM_MASK REG_GENMASK64(63, 20)
41 #define WOPCM_SIZE_MASK REG_GENMASK64(9, 7)
/drivers/gpu/drm/i915/gt/uc/
A Dintel_gsc_uc_heci_cmd_submit.h45 #define HOST_SESSION_MASK REG_GENMASK64(63, 60)

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