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Searched refs:REG_RC_LVDS_PLL (Results 1 – 1 of 1) sorted by relevance

/drivers/gpu/drm/bridge/
A Dti-sn65dsi83.c54 #define REG_RC_LVDS_PLL 0x0a macro
171 regmap_reg_range(REG_RC_LVDS_PLL, REG_RC_DSI_CLK),
238 regmap_reg_range(REG_RC_LVDS_PLL, REG_RC_LVDS_PLL),
537 regmap_write(ctx->regmap, REG_RC_LVDS_PLL, in sn65dsi83_atomic_pre_enable()
621 ret = regmap_read_poll_timeout(ctx->regmap, REG_RC_LVDS_PLL, pval, in sn65dsi83_atomic_pre_enable()

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