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Searched refs:RING_DMA_FADD_UDW (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/xe/regs/
A Dxe_engine_regs.h72 #define RING_DMA_FADD_UDW(base) XE_REG((base) + 0x60) macro
/drivers/gpu/drm/i915/gt/
A Dintel_engine_regs.h59 #define RING_DMA_FADD_UDW(base) _MMIO((base) + 0x60) /* gen8+ */ macro
A Dintel_engine_cs.c2124 addr = ENGINE_READ64(engine, RING_DMA_FADD, RING_DMA_FADD_UDW); in intel_engine_print_registers()
/drivers/gpu/drm/i915/
A Di915_gpu_error.c1255 ee->faddr |= (u64)ENGINE_READ(engine, RING_DMA_FADD_UDW) << 32; in engine_record_registers()
1269 ee->dma_faddr_hi = ENGINE_READ(engine, RING_DMA_FADD_UDW); in engine_record_registers()
A Dintel_gvt_mmio_table.c1129 MMIO_RING_D(RING_DMA_FADD_UDW); in iterate_bxt_mmio()
/drivers/gpu/drm/i915/gt/uc/
A Dintel_guc_capture.c53 { RING_DMA_FADD_UDW(0), 0, 0, "RING_DMA_FADD_UDW" }, \
/drivers/gpu/drm/xe/
A Dxe_guc_capture.c132 { RING_DMA_FADD_UDW(0), REG_64BIT_HI_DW, 0, 0, 0, "RING_DMA_FADD"}, \

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