Home
last modified time | relevance | path

Searched refs:RING_HEAD (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/i915/gt/
A Dintel_ring_submission.c179 ENGINE_WRITE_FW(engine, RING_HEAD, ENGINE_READ_FW(engine, RING_TAIL)); in stop_ring()
180 ENGINE_POSTING_READ(engine, RING_HEAD); in stop_ring()
187 ENGINE_WRITE_FW(engine, RING_HEAD, 0); in stop_ring()
190 return (ENGINE_READ_FW(engine, RING_HEAD) & HEAD_ADDR) == 0; in stop_ring()
217 ENGINE_POSTING_READ(engine, RING_HEAD); in xcs_resume()
248 ENGINE_WRITE_FW(engine, RING_HEAD, ring->head); in xcs_resume()
249 if (ENGINE_READ_FW(engine, RING_HEAD) == ring->head) in xcs_resume()
256 ENGINE_READ_FW(engine, RING_HEAD), in xcs_resume()
296 ENGINE_READ(engine, RING_HEAD), ring->head, in xcs_resume()
365 ENGINE_READ_FW(engine, RING_HEAD), in reset_prepare()
[all …]
A Dintel_engine_regs.h14 #define RING_HEAD(base) _MMIO((base) + 0x34) macro
A Dintel_engine_cs.c1677 ENGINE_READ_FW(engine, RING_HEAD) & HEAD_ADDR, in intel_engine_stop_cs()
1685 if ((ENGINE_READ_FW(engine, RING_HEAD) & HEAD_ADDR) != in intel_engine_stop_cs()
1852 if ((ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR) != in ring_is_idle()
2094 ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR); in intel_engine_print_registers()
A Dintel_gt.c147 intel_uncore_write(uncore, RING_HEAD(base), 0); in init_unused_ring()
A Dselftest_lrc.c315 i915_mmio_reg_offset(RING_HEAD(engine->mmio_base)), in live_lrc_fixed()
A Dintel_execlists_submission.c1968 ENGINE_READ(engine, RING_HEAD) & HEAD_ADDR, in process_csb()
/drivers/gpu/drm/xe/regs/
A Dxe_engine_regs.h53 #define RING_HEAD(base) XE_REG((base) + 0x34) macro
/drivers/gpu/drm/i915/
A Di915_pmu.c397 head = ENGINE_READ_FW(engine, RING_HEAD); in gen2_engine_sample()
A Dintel_gvt_mmio_table.c92 MMIO_RING_D(RING_HEAD); in iterate_generic_mmio()
A Di915_gpu_error.c1280 ee->head = ENGINE_READ(engine, RING_HEAD); in engine_record_registers()
/drivers/gpu/drm/i915/gt/uc/
A Dintel_guc_capture.c68 { RING_HEAD(0), 0, 0, "HEAD" }, \
/drivers/gpu/drm/xe/
A Dxe_guc_capture.c113 { RING_HEAD(0), REG_32BIT, 0, 0, 0, "RING_HEAD"}, \
/drivers/gpu/drm/i915/gvt/
A Dscheduler.c973 vgpu_vreg_t(vgpu, RING_HEAD(ring_base)) = head; in update_guest_context()
A Dhandlers.c2243 MMIO_RING_DFH(RING_HEAD, D_ALL, 0, NULL, NULL); in init_generic_mmio_info()

Completed in 53 milliseconds