Searched refs:RVU_MBOX_PF_VFPF1_INT_ENA_W1CX (Results 1 – 4 of 4) sorted by relevance
140 otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(0), ~0ull); in cn20k_disable_pfvf_mbox_intr()141 otx2_write64(pf, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(1), ~0ull); in cn20k_disable_pfvf_mbox_intr()
56 #define RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(a) (0x10e0 | (a) << 3) macro
68 #define RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(a) (0x10e0 | (a) << 3) macro
350 rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(0), INTR_MASK(vfs)); in cn20k_rvu_disable_afvf_intr()358 rvupf_write64(rvu, RVU_MBOX_PF_VFPF1_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in cn20k_rvu_disable_afvf_intr()
Completed in 6 milliseconds