Searched refs:RVU_PF_INT (Results 1 – 6 of 6) sorted by relevance
| /drivers/net/ethernet/marvell/octeontx2/nic/ |
| A D | cn20k.c | 34 pf_trig_val = otx2_read64(pf, RVU_PF_INT) & 0x3ULL; in cn20k_pfaf_mbox_intr_handler()
37 otx2_write64(pf, RVU_PF_INT, pf_trig_val); in cn20k_pfaf_mbox_intr_handler()
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| A D | otx2_reg.h | 37 #define RVU_PF_INT (0xc20) macro
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| A D | otx2_pf.c | 1054 otx2_write64(pf, RVU_PF_INT, BIT_ULL(0)); in otx2_pfaf_mbox_intr_handler()
1154 otx2_write64(pf, RVU_PF_INT, BIT_ULL(0)); in otx2_register_mbox_intr()
1157 otx2_write64(pf, RVU_PF_INT, BIT_ULL(0) | BIT_ULL(1)); in otx2_register_mbox_intr()
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| /drivers/crypto/marvell/octeontx2/ |
| A D | otx2_cptpf_mbox.c | 426 intr = otx2_cpt_read64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT); in otx2_cptpf_afpf_mbox_intr()
443 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, in otx2_cptpf_afpf_mbox_intr()
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| A D | otx2_cptpf_main.c | 420 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, 0x1ULL); in cptpf_disable_afpf_mbox_intr()
439 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, RVU_PF_INT, 0x1ULL); in cptpf_register_afpf_mbox_intr()
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| /drivers/net/ethernet/marvell/octeontx2/af/ |
| A D | rvu_reg.h | 103 #define RVU_PF_INT (0xc20) macro
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