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Searched refs:RequiredDISPCLK (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddisplay_mode_vba_20.c3879 locals->RequiredDISPCLK[i][j] = 0.0; in dml20_ModeSupportAndSystemConfigurationFull()
3920 locals->RequiredDISPCLK[i][j] = dml_max( in dml20_ModeSupportAndSystemConfigurationFull()
3921 locals->RequiredDISPCLK[i][j], in dml20_ModeSupportAndSystemConfigurationFull()
3954 locals->RequiredDISPCLK[i][j] = 0.0; in dml20_ModeSupportAndSystemConfigurationFull()
3976 locals->RequiredDISPCLK[i][j] = dml_max( in dml20_ModeSupportAndSystemConfigurationFull()
3977 locals->RequiredDISPCLK[i][j], in dml20_ModeSupportAndSystemConfigurationFull()
3988 locals->RequiredDISPCLK[i][j] = dml_max( in dml20_ModeSupportAndSystemConfigurationFull()
3989 locals->RequiredDISPCLK[i][j], in dml20_ModeSupportAndSystemConfigurationFull()
4358 dml_min(locals->LinesInDETChroma * locals->RequiredDISPCLK[i][j] * in dml20_ModeSupportAndSystemConfigurationFull()
4631 mode_lib->vba.WritebackDestinationWidth[k]) / locals->RequiredDISPCLK[i][j]; in dml20_ModeSupportAndSystemConfigurationFull()
[all …]
A Ddisplay_mode_vba_20v2.c3990 locals->RequiredDISPCLK[i][j] = 0.0; in dml20v2_ModeSupportAndSystemConfigurationFull()
4034 locals->RequiredDISPCLK[i][j] = dml_max( in dml20v2_ModeSupportAndSystemConfigurationFull()
4035 locals->RequiredDISPCLK[i][j], in dml20v2_ModeSupportAndSystemConfigurationFull()
4068 locals->RequiredDISPCLK[i][j] = 0.0; in dml20v2_ModeSupportAndSystemConfigurationFull()
4090 locals->RequiredDISPCLK[i][j] = dml_max( in dml20v2_ModeSupportAndSystemConfigurationFull()
4091 locals->RequiredDISPCLK[i][j], in dml20v2_ModeSupportAndSystemConfigurationFull()
4102 locals->RequiredDISPCLK[i][j] = dml_max( in dml20v2_ModeSupportAndSystemConfigurationFull()
4103 locals->RequiredDISPCLK[i][j], in dml20v2_ModeSupportAndSystemConfigurationFull()
4753 mode_lib->vba.WritebackDestinationWidth[k]) / locals->RequiredDISPCLK[i][j]; in dml20v2_ModeSupportAndSystemConfigurationFull()
4770 mode_lib->vba.WritebackDestinationWidth[m]) / locals->RequiredDISPCLK[i][j]); in dml20v2_ModeSupportAndSystemConfigurationFull()
[all …]
A Ddcn20_fpu.c1747 …pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel][context->bw… in dcn20_calculate_wm()
2257 …pipes[pipe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel_req][context… in dcn21_calculate_wm()
/drivers/gpu/drm/amd/display/dc/dml/dcn21/
A Ddisplay_mode_vba_21.c3432 myPipe.DISPCLK = locals->RequiredDISPCLK[i][j]; in CalculatePrefetchSchedulePerPlane()
4079 locals->RequiredDISPCLK[i][j] = 0.0; in dml21_ModeSupportAndSystemConfigurationFull()
4128 locals->RequiredDISPCLK[i][j] = dml_max( in dml21_ModeSupportAndSystemConfigurationFull()
4129 locals->RequiredDISPCLK[i][j], in dml21_ModeSupportAndSystemConfigurationFull()
4162 locals->RequiredDISPCLK[i][j] = 0.0; in dml21_ModeSupportAndSystemConfigurationFull()
4184 locals->RequiredDISPCLK[i][j] = dml_max( in dml21_ModeSupportAndSystemConfigurationFull()
4185 locals->RequiredDISPCLK[i][j], in dml21_ModeSupportAndSystemConfigurationFull()
4196 locals->RequiredDISPCLK[i][j] = dml_max( in dml21_ModeSupportAndSystemConfigurationFull()
4197 locals->RequiredDISPCLK[i][j], in dml21_ModeSupportAndSystemConfigurationFull()
4752 mode_lib->vba.WritebackDestinationWidth[k]) / locals->RequiredDISPCLK[i][j]; in dml21_ModeSupportAndSystemConfigurationFull()
[all …]
/drivers/gpu/drm/amd/display/dc/dml/dcn30/
A Ddisplay_mode_vba_30.c3851 v->RequiredDISPCLK[i][j] = 0.0; in dml30_ModeSupportAndSystemConfigurationFull()
3929 v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->PlaneRequiredDISPCLK); in dml30_ModeSupportAndSystemConfigurationFull()
3964 v->RequiredDISPCLK[i][j] = 0.0; in dml30_ModeSupportAndSystemConfigurationFull()
3983 v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->PlaneRequiredDISPCLK); in dml30_ModeSupportAndSystemConfigurationFull()
3994 v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->WritebackRequiredDISPCLK); in dml30_ModeSupportAndSystemConfigurationFull()
4581 v->HTotal[k]) / v->RequiredDISPCLK[i][j]; in dml30_ModeSupportAndSystemConfigurationFull()
4598 v->HTotal[m]) / v->RequiredDISPCLK[i][j]); in dml30_ModeSupportAndSystemConfigurationFull()
4754 myPipe.DISPCLK = v->RequiredDISPCLK[i][j]; in dml30_ModeSupportAndSystemConfigurationFull()
6581 v->RequiredDISPCLK[i][j], in UseMinimumDCFCLK()
/drivers/gpu/drm/amd/display/dc/dml/dcn32/
A Ddisplay_mode_vba_util_32.h620 double RequiredDISPCLK[][2],
A Ddisplay_mode_vba_32.c2247 mode_lib->vba.RequiredDISPCLK[i][j] = mode_lib->vba.WritebackRequiredDISPCLK; in dml32_ModeSupportAndSystemConfigurationFull()
2249 mode_lib->vba.RequiredDISPCLK[i][j] = dml_max(mode_lib->vba.RequiredDISPCLK[i][j], in dml32_ModeSupportAndSystemConfigurationFull()
2266 mode_lib->vba.DISPCLK_DPPCLK_Support[i][j] = !((mode_lib->vba.RequiredDISPCLK[i][j] in dml32_ModeSupportAndSystemConfigurationFull()
2928 / mode_lib->vba.RequiredDISPCLK[i][j]; in dml32_ModeSupportAndSystemConfigurationFull()
2947 mode_lib->vba.RequiredDISPCLK[i][j]); in dml32_ModeSupportAndSystemConfigurationFull()
3085 mode_lib->vba.RequiredDISPCLK, in dml32_ModeSupportAndSystemConfigurationFull()
3269 …s.dml32_ModeSupportAndSystemConfigurationFull.myPipe.Dispclk = mode_lib->vba.RequiredDISPCLK[i][j]; in dml32_ModeSupportAndSystemConfigurationFull()
3737 …mode_lib->vba.DISPCLK = mode_lib->vba.RequiredDISPCLK[mode_lib->vba.VoltageLevel][MaximumMPCCombin… in dml32_ModeSupportAndSystemConfigurationFull()
A Ddisplay_mode_vba_util_32.c2954 double RequiredDISPCLK[][2], in dml32_UseMinimumDCFCLK()
3092 RequiredDISPCLK[i][j], in dml32_UseMinimumDCFCLK()
/drivers/gpu/drm/amd/display/dc/dml/dcn31/
A Ddisplay_mode_vba_31.c3684 myPipe.DISPCLK = v->RequiredDISPCLK[i][j];
4063 v->RequiredDISPCLK[i][j] = 0.0;
4158 v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->PlaneRequiredDISPCLK);
4205 v->RequiredDISPCLK[i][j] = 0.0;
4227 v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->PlaneRequiredDISPCLK);
4239 v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->WritebackRequiredDISPCLK);
4970 v->HTotal[k]) / v->RequiredDISPCLK[i][j];
4987 v->HTotal[m]) / v->RequiredDISPCLK[i][j]);
7133 v->RequiredDISPCLK[i][j],
/drivers/gpu/drm/amd/display/dc/dml/dcn314/
A Ddisplay_mode_vba_314.c3790 myPipe.DISPCLK = v->RequiredDISPCLK[i][j];
4153 v->RequiredDISPCLK[i][j] = 0.0;
4248 v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->PlaneRequiredDISPCLK);
4292 v->RequiredDISPCLK[i][j] = 0.0;
4314 v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->PlaneRequiredDISPCLK);
4326 v->RequiredDISPCLK[i][j] = dml_max(v->RequiredDISPCLK[i][j], v->WritebackRequiredDISPCLK);
5058 v->HTotal[k]) / v->RequiredDISPCLK[i][j];
5075 v->HTotal[m]) / v->RequiredDISPCLK[i][j]);
7220 v->RequiredDISPCLK[i][j],
/drivers/gpu/drm/amd/display/dc/dml2/
A Ddisplay_mode_core_structs.h826 dml_float_t RequiredDISPCLK[2]; /// <brief Required DISPCLK; depends on pixel rate; odm mode etc. member
1303 dml_float_t *RequiredDISPCLK; member
A Ddisplay_mode_core.c4663 p->RequiredDISPCLK[j], in UseMinimumDCFCLK()
6366 myPipe->Dispclk = mode_lib->ms.RequiredDISPCLK[j]; in dml_prefetch_check()
7220 mode_lib->ms.RequiredDISPCLK[j] = mode_lib->ms.WritebackRequiredDISPCLK; in dml_core_mode_support()
7222 …mode_lib->ms.RequiredDISPCLK[j] = dml_max(mode_lib->ms.RequiredDISPCLK[j], mode_lib->ms.RequiredDI… in dml_core_mode_support()
7242 …mode_lib->ms.support.DISPCLK_DPPCLK_Support[j] = !((mode_lib->ms.RequiredDISPCLK[j] > mode_lib->ms… in dml_core_mode_support()
7856 mode_lib->ms.cache_display_cfg.timing.HTotal[k]) / mode_lib->ms.RequiredDISPCLK[j]; in dml_core_mode_support()
7871 mode_lib->ms.cache_display_cfg.timing.HTotal[m]) / mode_lib->ms.RequiredDISPCLK[j]); in dml_core_mode_support()
7985 UseMinimumDCFCLK_params->RequiredDISPCLK = mode_lib->ms.RequiredDISPCLK; in dml_core_mode_support()
/drivers/gpu/drm/amd/display/dc/dml/
A Ddisplay_mode_vba.h759 double RequiredDISPCLK[DC__VOLTAGE_STATES][2]; member
/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
A Ddml2_core_dcn4.c431 …t_result.global.dispclk_khz = (unsigned int)(core->clean_me_up.mode_lib.ms.RequiredDISPCLK * 1000); in core_dcn4_mode_support()
A Ddml2_core_shared_types.h347 double RequiredDISPCLK; /// <brief Required DISPCLK; depends on pixel rate; odm mode etc. member
A Ddml2_core_dcn4_calcs.c7310 calculate_tdlut_setting_params->dispclk_mhz = mode_lib->ms.RequiredDISPCLK; in dml_core_ms_prefetch_check()
7406 myPipe->Dispclk = mode_lib->ms.RequiredDISPCLK; in dml_core_ms_prefetch_check()
7543 mode_lib->ms.RequiredDISPCLK, in dml_core_ms_prefetch_check()
8569 mode_lib->ms.RequiredDISPCLK = mode_lib->ms.WritebackRequiredDISPCLK; in dml_core_mode_support()
8571 …mode_lib->ms.RequiredDISPCLK = math_max2(mode_lib->ms.RequiredDISPCLK, mode_lib->ms.RequiredDISPCL… in dml_core_mode_support()
8580 …mode_lib->ms.support.DISPCLK_DPPCLK_Support = !((mode_lib->ms.RequiredDISPCLK > mode_lib->ms.max_d… in dml_core_mode_support()
9156 …ors[display_cfg->plane_descriptors[k].stream_index].timing.h_total) / mode_lib->ms.RequiredDISPCLK; in dml_core_mode_support()

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