Searched refs:SCL (Results 1 – 10 of 10) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_i2c_sw.c | 29 #define SCL false macro
85 if (read_bit_from_ddc(ddc, SCL)) in wait_for_scl_high_sw()
113 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw()
118 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw()
134 write_bit_to_ddc(ddc_handle, SCL, true); in write_byte_sw()
145 write_bit_to_ddc(ddc_handle, SCL, false); in write_byte_sw()
168 write_bit_to_ddc(ddc_handle, SCL, true); in read_byte_sw()
197 write_bit_to_ddc(ddc_handle, SCL, true); in read_byte_sw()
202 write_bit_to_ddc(ddc_handle, SCL, false); in read_byte_sw()
231 write_bit_to_ddc(ddc_handle, SCL, true); in stop_sync_sw()
[all …]
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| A D | dce_transform.h | 76 SRI(SCL_MODE, SCL, id), \
77 SRI(SCL_TAP_CONTROL, SCL, id), \
78 SRI(SCL_CONTROL, SCL, id), \
86 SRI(VIEWPORT_START, SCL, id), \
87 SRI(VIEWPORT_SIZE, SCL, id), \
94 SRI(SCL_UPDATE, SCL, id), \
147 SRI(SCL_TAP_CONTROL, SCL, id), \
148 SRI(SCL_CONTROL, SCL, id), \
156 SRI(VIEWPORT_START, SCL, id), \
157 SRI(VIEWPORT_SIZE, SCL, id), \
[all …]
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| /drivers/i2c/busses/ |
| A D | i2c-acorn.c | 19 #define SCL 0x02 macro
32 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setscl()
36 ones |= SCL; in ioc_setscl()
38 ones &= ~SCL; in ioc_setscl()
47 u_int ioc_control = ioc_readb(IOC_CONTROL) & ~(SCL | SDA); in ioc_setsda()
62 return (ioc_readb(IOC_CONTROL) & SCL) != 0; in ioc_getscl()
87 force_ones = FORCE_ONES | SCL | SDA; in i2c_ioc_init()
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| A D | i2c-versatile.c | 20 #define SCL (1 << 0) macro
40 writel(SCL, i2c->base + (state ? I2C_CONTROLS : I2C_CONTROLC)); in i2c_versatile_setscl()
52 return !!(readl(i2c->base + I2C_CONTROL) & SCL); in i2c_versatile_getscl()
77 writel(SCL | SDA, i2c->base + I2C_CONTROLS); in i2c_versatile_probe()
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| A D | Kconfig | 696 arch-neutral GPIO API to control the SCL and SDA lines.
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| /drivers/rtc/ |
| A D | rtc-rs5c313.c | 73 #define SCL SCSPTR1_SPB0DT macro
95 scsptr1_data = __raw_readb(SCSPTR1) | SCL; /* SCL:H */ in rs5c313_init_port()
116 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_write_data()
119 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_write_data()
136 scsptr1_data &= ~SCL; /* SCL:L */ in rs5c313_read_data()
139 scsptr1_data |= SCL; /* SCL:H */ in rs5c313_read_data()
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| /drivers/gpu/drm/amd/display/dc/gpio/ |
| A D | ddc_regs.h | 178 DDC_I2C_REG_LIST(SCL)\
197 DDC_REG_LIST_DCN2(SCL)\
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| /drivers/scsi/ |
| A D | nsp32.c | 3229 nsp32_prom_set(data, SCL, 1); in nsp32_prom_start()
3234 nsp32_prom_set(data, SCL, 0); in nsp32_prom_start()
3240 nsp32_prom_set(data, SCL, 1); in nsp32_prom_stop()
3244 nsp32_prom_set(data, SCL, 0); in nsp32_prom_stop()
3251 nsp32_prom_set(data, SCL, 1 ); in nsp32_prom_write_bit()
3252 nsp32_prom_set(data, SCL, 0 ); in nsp32_prom_write_bit()
3261 nsp32_prom_set(data, SCL, 1); in nsp32_prom_read_bit()
3265 nsp32_prom_set(data, SCL, 0); in nsp32_prom_read_bit()
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| A D | nsp32.h | 392 # define SCL BIT(0) macro
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| /drivers/auxdisplay/ |
| A D | Kconfig | 221 (SDA/SCL), while parallel ones use 2 or 3 wires for the control signals
272 int "Parallel port pin number & polarity connected to the LCD SCL signal (-17...17) "
277 LCD 'SCL' signal has been connected. It can be :
283 Default for the 'SCL' pin in custom profile is '1' (STROBE).
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