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Searched refs:SDHCI_CLOCK_CONTROL (Results 1 – 22 of 22) sorted by relevance

/drivers/mmc/host/
A Dsdhci-milbeaut.c92 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
94 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
99 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
105 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_reset()
218 ctl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
220 sdhci_writew(host, ctl, SDHCI_CLOCK_CONTROL); in sdhci_milbeaut_init()
A Dsdhci-pci-o2micro.c260 sdhci_writeb(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
277 sdhci_writeb(host, scratch_8, SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
288 SDHCI_CLOCK_CONTROL); in sdhci_o2_dll_recovery()
350 reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
352 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
374 reg_val = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
376 sdhci_writew(host, reg_val, SDHCI_CLOCK_CONTROL); in sdhci_o2_execute_tuning()
569 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
574 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_o2_enable_clk()
589 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_pci_o2_set_clock()
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A Dsdhci-s3c.c268 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); in sdhci_s3c_set_clock()
379 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
386 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
388 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
398 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
402 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_cmu_set_clock()
414 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
A Dsdhci-of-at91.c76 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
78 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
86 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
90 1000, 20000, false, host, SDHCI_CLOCK_CONTROL)) { in sdhci_at91_set_clock()
97 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
A Dsdhci-of-dwcmshc.c919 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in cv18xx_sdhci_set_tap()
921 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in cv18xx_sdhci_set_tap()
935 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in cv18xx_sdhci_set_tap()
1268 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_cqhci_init()
1270 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in dwcmshc_cqhci_init()
1271 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_cqhci_init()
1297 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_cqhci_init()
1299 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in dwcmshc_cqhci_init()
1476 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in dwcmshc_disable_card_clk()
1479 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in dwcmshc_disable_card_clk()
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A Dsdhci-pci-gli.c588 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9750_set_clock()
788 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9755_set_clock()
1192 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_gl9767_set_clock()
1368 value = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1370 sdhci_writew(host, value, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1402 value = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9767_init_sd_express()
1799 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_suspend()
1801 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_suspend()
1815 clock = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
1819 sdhci_writew(host, clock, SDHCI_CLOCK_CONTROL); in gl9763e_runtime_resume()
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A Dsdhci-of-ma35d1.c57 { SDHCI_CLOCK_CONTROL, sizeof(u32)},
275 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in ma35_disable_card_clk()
278 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in ma35_disable_card_clk()
A Dsdhci-sprd.c177 u16 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
180 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_off()
187 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
189 sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); in sdhci_sprd_sd_clk_on()
235 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in _sdhci_sprd_set_clock()
295 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_sprd_set_clock()
A Dsdhci-xenon-phy.c228 1100, 20000, false, host, SDHCI_CLOCK_CONTROL); in xenon_check_stability_internal_clk()
639 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
641 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
663 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
665 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in xenon_emmc_phy_set()
A Dsdhci_f_sdh30.c77 if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) in sdhci_f_sdh30_reset()
78 sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL); in sdhci_f_sdh30_reset()
A Dsdhci-brcmstb.c97 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in brcmstb_sdhci_reset_cmd_data()
98 sdhci_writel(host, reg | new_mask, SDHCI_CLOCK_CONTROL); in brcmstb_sdhci_reset_cmd_data()
151 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_brcmstb_set_clock()
A Dsdhci-pci-dwc-mshc.c70 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_snps_set_clock()
A Dsdhci-xenon.c32 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
34 sdhci_writel(host, reg, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
40 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
A Dsdhci-uhs2.c445 u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_uhs2_disable_clk()
448 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_uhs2_disable_clk()
456 u16 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_uhs2_enable_clk()
461 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_uhs2_enable_clk()
464 10, timeout_us, true, host, SDHCI_CLOCK_CONTROL)) { in sdhci_uhs2_enable_clk()
A Dsdhci-of-arasan.c415 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_arasan_set_clock()
420 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_arasan_set_clock()
1106 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
1108 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
1113 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in arasan_zynqmp_dll_reset()
A Dsdhci.c73 sdhci_readw(host, SDHCI_CLOCK_CONTROL)); in sdhci_dumpregs()
1928 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_calc_clk()
2013 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2020 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2036 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2043 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2058 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_enable_clk()
2068 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in sdhci_set_clock()
2460 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_set_ios()
2463 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); in sdhci_set_ios()
A Dsdhci-esdhc-mcf.c274 esdhc_clrset_be(host, 0x0000fff7, temp, SDHCI_CLOCK_CONTROL); in esdhc_mcf_pltfm_set_clock()
A Dsdhci-of-aspeed.c249 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in aspeed_sdhci_set_clock()
A Dsdhci.h144 #define SDHCI_CLOCK_CONTROL 0x2C macro
A Dsdhci-tegra.c256 reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
267 sdhci_writew(host, reg, SDHCI_CLOCK_CONTROL); in tegra_sdhci_configure_card_clk()
A Dsdhci-msm.c1833 sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
1843 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
A Dsdhci-esdhc-imx.c726 case SDHCI_CLOCK_CONTROL: in esdhc_writew_le()

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