| /drivers/mmc/host/ |
| A D | sdhci.c | 96 sdhci_readw(host, SDHCI_HOST_CONTROL2)); in sdhci_dumpregs()
131 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
136 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_do_enable_v4_mode()
346 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
348 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in sdhci_config_dma()
2650 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_start_signal_voltage_switch()
2658 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_start_signal_voltage_switch()
2758 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_start_tuning()
2762 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_start_tuning()
2790 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_reset_tuning()
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| A D | sdhci-xenon.c | 203 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
221 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
299 reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_ios()
301 sdhci_writew(host, reg, SDHCI_HOST_CONTROL2); in xenon_set_ios()
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| A D | sdhci-pci-gli.c | 391 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
393 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
411 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in gli_set_9750()
413 sdhci_writew(host, ctrl2, SDHCI_HOST_CONTROL2); in gli_set_9750()
457 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_execute_tuning_9750()
992 ctrl2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_gli_enable_internal_clock()
999 sdhci_writew(host, SDHCI_CTRL_V4_MODE, SDHCI_HOST_CONTROL2); in sdhci_gli_enable_internal_clock()
1641 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
1652 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_set_gl9763e_signaling()
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| A D | sdhci-sprd.c | 342 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
374 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_set_uhs_signaling()
559 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
562 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_sprd_hs400_enhanced_strobe()
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| A D | sdhci-acpi.c | 553 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
555 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
557 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_set_ios()
559 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_set_ios()
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| A D | sdhci-st.c | 261 u16 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
304 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
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| A D | sdhci-brcmstb.c | 166 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
185 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_brcmstb_set_uhs_signaling()
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| A D | sdhci-pxav3.c | 248 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
292 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
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| A D | sdhci-of-dwcmshc.c | 418 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
445 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in dwcmshc_set_uhs_signaling()
846 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in th1520_sdhci_reset()
849 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in th1520_sdhci_reset()
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| A D | sdhci-msm.c | 1336 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
1396 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
2196 case SDHCI_HOST_CONTROL2: in __sdhci_msm_check_write()
2325 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
2347 sdhci_writew(host, ctrl, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
2354 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_start_signal_voltage_switch()
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| A D | sdhci-of-k1.c | 116 spacemit_sdhci_setbits(host, SDHCI_CTRL_VDD_180, SDHCI_HOST_CONTROL2); in spacemit_sdhci_set_uhs_signaling()
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| A D | sdhci-pci-core.c | 1678 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1680 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1682 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1684 sdhci_writew(host, val, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
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| A D | sdhci-uhs2.c | 278 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_uhs2_set_ios()
287 sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); in __sdhci_uhs2_set_ios()
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| A D | sdhci.h | 226 #define SDHCI_HOST_CONTROL2 0x3E macro
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| A D | sdhci-esdhc-imx.c | 677 if (unlikely(reg == SDHCI_HOST_CONTROL2)) { in esdhc_readw_le()
736 case SDHCI_HOST_CONTROL2: in esdhc_writew_le()
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| A D | sdhci-pci-o2micro.c | 217 u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_o2_execute_tuning()
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