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Searched refs:SF_POWER (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
A Di915_hwmon.c29 #define SF_POWER 1000000 macro
426 SF_POWER); in hwm_power_max_read()
431 min = mul_u64_u32_shr(min, SF_POWER, hwmon->scl_shift_power); in hwm_power_max_read()
433 max = mul_u64_u32_shr(max, SF_POWER, hwmon->scl_shift_power); in hwm_power_max_read()
486 nval = DIV_ROUND_CLOSEST_ULL((u64)val << hwmon->scl_shift_power, SF_POWER); in hwm_power_max_write()
512 SF_POWER); in hwm_power_read()
521 SF_POWER, POWER_SETUP_I1_SHIFT); in hwm_power_read()
537 uval = DIV_ROUND_CLOSEST_ULL(val << POWER_SETUP_I1_SHIFT, SF_POWER); in hwm_power_write()
/drivers/gpu/drm/xe/
A Dxe_hwmon.c75 #define SF_POWER 1000000 /* microwatts */ macro
313 *value = mul_u64_u32_shr(reg_val, SF_POWER, hwmon->scl_shift_power); in xe_hwmon_power_max_read()
320 min = mul_u64_u32_shr(min, SF_POWER, hwmon->scl_shift_power); in xe_hwmon_power_max_read()
321 max = mul_u64_u32_shr(max, SF_POWER, hwmon->scl_shift_power); in xe_hwmon_power_max_read()
366 max_supp_power_limit = ((PWR_LIM_VAL) >> hwmon->scl_shift_power) * SF_POWER; in xe_hwmon_power_max_write()
375 reg_val = DIV_ROUND_CLOSEST_ULL((u64)value << hwmon->scl_shift_power, SF_POWER); in xe_hwmon_power_max_write()
425 *value = mul_u64_u32_shr(reg_val, SF_POWER, hwmon->scl_shift_power); in xe_hwmon_power_rated_max_read()
898 return xe_hwmon_power_curr_crit_read(hwmon, channel, val, SF_POWER); in xe_hwmon_power_read()
912 return xe_hwmon_power_curr_crit_write(hwmon, channel, val, SF_POWER); in xe_hwmon_power_write()

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