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Searched refs:SIZE (Results 1 – 25 of 32) sorted by relevance

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/drivers/crypto/intel/qat/qat_common/
A Dadf_transport_access_macros.h35 #define ADF_MSG_SIZE_TO_BYTES(SIZE) (SIZE << 5) argument
36 #define ADF_BYTES_TO_MSG_SIZE(SIZE) (SIZE >> 5) argument
37 #define ADF_SIZE_TO_RING_SIZE_IN_BYTES(SIZE) ((1 << (SIZE - 1)) << 7) argument
38 #define ADF_RING_SIZE_IN_BYTES_TO_SIZE(SIZE) ((1 << (SIZE - 1)) >> 7) argument
41 #define ADF_RING_SIZE_BYTES_MIN(SIZE) \ argument
42 ((SIZE < ADF_SIZE_TO_RING_SIZE_IN_BYTES(ADF_RING_SIZE_4K)) ? \
43 ADF_SIZE_TO_RING_SIZE_IN_BYTES(ADF_RING_SIZE_4K) : SIZE)
44 #define ADF_RING_SIZE_MODULO(SIZE) (SIZE + 0x6) argument
45 #define ADF_SIZE_TO_POW(SIZE) ((((SIZE & 0x4) >> 1) | ((SIZE & 0x4) >> 2) | \ argument
46 SIZE) & ~0x4)
/drivers/hid/
A Dhid-roccat-common.h47 #define ROCCAT_COMMON2_SYSFS_W(thingy, COMMAND, SIZE) \ argument
53 SIZE, COMMAND); \
62 SIZE, COMMAND); \
66 ROCCAT_COMMON2_SYSFS_W(thingy, COMMAND, SIZE) \
67 ROCCAT_COMMON2_SYSFS_R(thingy, COMMAND, SIZE)
70 ROCCAT_COMMON2_SYSFS_RW(thingy, COMMAND, SIZE); \
73 .size = SIZE, \
79 ROCCAT_COMMON2_SYSFS_R(thingy, COMMAND, SIZE); \
82 .size = SIZE, \
87 ROCCAT_COMMON2_SYSFS_W(thingy, COMMAND, SIZE); \
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/drivers/gpu/nova-core/regs/
A Dmacros.rs324 T: ::core::ops::Deref<Target = ::kernel::io::Io<SIZE>>,
331 T: ::core::ops::Deref<Target = ::kernel::io::Io<SIZE>>,
337 pub(crate) fn alter<const SIZE: usize, T, F>(
341 T: ::core::ops::Deref<Target = ::kernel::io::Io<SIZE>>,
355 pub(crate) fn read<const SIZE: usize, T>(
359 T: ::core::ops::Deref<Target = ::kernel::io::Io<SIZE>>,
365 pub(crate) fn write<const SIZE: usize, T>(
376 pub(crate) fn alter<const SIZE: usize, T, F>(
389 pub(crate) fn try_read<const SIZE: usize, T>(
399 pub(crate) fn try_write<const SIZE: usize, T>(
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/drivers/gpu/drm/amd/amdgpu/
A Dnbio_v7_11.c77 SIZE, doorbell_size); in nbio_v7_11_sdma_doorbell_range()
81 SIZE, 0); in nbio_v7_11_sdma_doorbell_range()
102 SIZE, doorbell_size); in nbio_v7_11_vpe_doorbell_range()
106 SIZE, 0); in nbio_v7_11_vpe_doorbell_range()
127 GDC0_BIF_VCN0_DOORBELL_RANGE, SIZE, 8); in nbio_v7_11_vcn_doorbell_range()
130 GDC0_BIF_VCN0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_11_vcn_doorbell_range()
184 GDC0_BIF_IH_DOORBELL_RANGE, SIZE, in nbio_v7_11_ih_doorbell_range()
188 GDC0_BIF_IH_DOORBELL_RANGE, SIZE, in nbio_v7_11_ih_doorbell_range()
A Dnbio_v7_0.c77 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size); in nbio_v7_0_sdma_doorbell_range()
79 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_0_sdma_doorbell_range()
96 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 8); in nbio_v7_0_vcn_doorbell_range()
99 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_0_vcn_doorbell_range()
123 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 2); in nbio_v7_0_ih_doorbell_range()
125 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0); in nbio_v7_0_ih_doorbell_range()
A Dnbio_v7_7.c77 SIZE, doorbell_size); in nbio_v7_7_sdma_doorbell_range()
81 SIZE, 0); in nbio_v7_7_sdma_doorbell_range()
98 GDC0_BIF_VCN0_DOORBELL_RANGE, SIZE, 8); in nbio_v7_7_vcn_doorbell_range()
101 GDC0_BIF_VCN0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_7_vcn_doorbell_range()
156 GDC0_BIF_IH_DOORBELL_RANGE, SIZE, in nbio_v7_7_ih_doorbell_range()
160 GDC0_BIF_IH_DOORBELL_RANGE, SIZE, in nbio_v7_7_ih_doorbell_range()
A Dnbio_v7_2.c120 SIZE, doorbell_size); in nbio_v7_2_sdma_doorbell_range()
124 SIZE, 0); in nbio_v7_2_sdma_doorbell_range()
141 GDC0_BIF_VCN0_DOORBELL_RANGE, SIZE, 8); in nbio_v7_2_vcn_doorbell_range()
144 GDC0_BIF_VCN0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_2_vcn_doorbell_range()
198 GDC0_BIF_IH_DOORBELL_RANGE, SIZE, in nbio_v7_2_ih_doorbell_range()
202 GDC0_BIF_IH_DOORBELL_RANGE, SIZE, in nbio_v7_2_ih_doorbell_range()
A Dnbio_v2_3.c124 BIF_SDMA0_DOORBELL_RANGE, SIZE, in nbio_v2_3_sdma_doorbell_range()
128 BIF_SDMA0_DOORBELL_RANGE, SIZE, in nbio_v2_3_sdma_doorbell_range()
147 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 8); in nbio_v2_3_vcn_doorbell_range()
150 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 0); in nbio_v2_3_vcn_doorbell_range()
196 BIF_IH_DOORBELL_RANGE, SIZE, in nbio_v2_3_ih_doorbell_range()
200 BIF_IH_DOORBELL_RANGE, SIZE, in nbio_v2_3_ih_doorbell_range()
A Dnbio_v6_1.c98 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size); in nbio_v6_1_sdma_doorbell_range()
100 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0); in nbio_v6_1_sdma_doorbell_range()
140 BIF_IH_DOORBELL_RANGE, SIZE, 6); in nbio_v6_1_ih_doorbell_range()
142 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0); in nbio_v6_1_ih_doorbell_range()
A Dnbio_v7_4.c172 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, doorbell_size); in nbio_v7_4_sdma_doorbell_range()
174 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_4_sdma_doorbell_range()
200 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 8); in nbio_v7_4_vcn_doorbell_range()
203 BIF_MMSCH0_DOORBELL_RANGE, SIZE, 0); in nbio_v7_4_vcn_doorbell_range()
240 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 8); in nbio_v7_4_ih_doorbell_range()
242 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, SIZE, 0); in nbio_v7_4_ih_doorbell_range()
/drivers/platform/arm64/
A Dhuawei-gaokun-ec.c75 #define MKREQ(REG0, REG1, SIZE, ...) \ argument
77 REG0, REG1, SIZE, \
81 [3 + (SIZE)] = 0, \
84 #define MKRESP(SIZE) \ argument
86 [RESP_HDR_SIZE + (SIZE) - 1] = 0, \
/drivers/media/platform/amphion/
A Dvpu_msgs.c353 const unsigned int SIZE = sizeof(u32); in vpu_core_run_msg_work() local
355 while (kfifo_len(&core->msg_fifo) >= SIZE) { in vpu_core_run_msg_work()
358 if (kfifo_out(&core->msg_fifo, &data, SIZE) == SIZE) in vpu_core_run_msg_work()
/drivers/gpu/drm/nouveau/dispnv50/
A Dhead827d.c42 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); in head827d_curs_clr()
61 NVVAL(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head827d_curs_set()
A Dheadca7d.c154 NVVAL(NVCA7D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in headca7d_curs_set()
210 NVVAL(NVCA7D, HEAD_SET_OLUT_CONTROL, SIZE, asyh->olut.size), in headca7d_olut_set()
A Dheadc37d.c135 NVVAL(NVC37D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in headc37d_curs_set()
186 NVVAL(NVC37D, HEAD_SET_CONTROL_OUTPUT_LUT, SIZE, asyh->olut.size) | in headc37d_olut_set()
A Dhead917d.c91 NVVAL(NV917D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head917d_curs_set()
A Dhead507d.c135 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); in head507d_curs_clr()
152 NVVAL(NV507D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head507d_curs_set()
A Dhead907d.c165 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64)); in head907d_curs_clr()
184 NVVAL(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, asyh->curs.layout) | in head907d_curs_set()
A Dwndwc57e.c135 NVVAL(NVC57E, SET_ILUT_CONTROL, SIZE, asyw->xlut.i.size) | in wndwc57e_ilut_set()
A Dwndwca7e.c132 NVVAL(NVCA7E, SET_ILUT_CONTROL, SIZE, asyw->xlut.i.size) | in wndwca7e_ilut_set()
/drivers/net/ethernet/qualcomm/emac/
A Demac-mac.c234 #define EMAC_RRD(RXQ, SIZE, IDX) ((RXQ)->rrd.v_addr + (SIZE * (IDX))) argument
235 #define EMAC_RFD(RXQ, SIZE, IDX) ((RXQ)->rfd.v_addr + (SIZE * (IDX))) argument
236 #define EMAC_TPD(TXQ, SIZE, IDX) ((TXQ)->tpd.v_addr + (SIZE * (IDX))) argument
/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
A Dvmm.h318 #define VMM_MAP_ITER(VMM,PT,PTEI,PTEN,MAP,FILL,BASE,SIZE,NEXT) do { \ argument
321 u64 _ptes = ((SIZE) - MAP->off) >> MAP->page->shift; \
/drivers/dma/
A Dpch_dma.c334 channel_writel(pd_chan, SIZE, desc->regs.size); in pdc_dostart()
749 pd->ch_regs[i].size = channel_readl(pd_chan, SIZE); in pch_dma_save_regs()
772 channel_writel(pd_chan, SIZE, pd->ch_regs[i].size); in pch_dma_restore_regs()
/drivers/media/usb/pwc/
A Dpwc.h62 #define PWC_DEBUG_SIZE(fmt, args...) PWC_DEBUG(SIZE, fmt, ##args)
/drivers/media/pci/cobalt/
A Dcobalt-omnitek.c49 #define SIZE(c) (BASE + 0x58 + ((c) * 0x40)) macro

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