Searched refs:SNPS_PHY_MPLLB_DIV5_CLK_EN (Results 1 – 3 of 3) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| A D | intel_snps_phy.c | 105 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
132 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
154 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
175 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
195 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
230 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
278 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
309 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
340 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
372 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, 1) |
[all …]
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| A D | intel_snps_phy_regs.h | 31 #define SNPS_PHY_MPLLB_DIV5_CLK_EN REG_BIT(29) macro
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| A D | intel_snps_hdmi_pll.c | 271 REG_FIELD_PREP(SNPS_PHY_MPLLB_DIV5_CLK_EN, pll_params.mpll_div5_en) | in intel_snps_hdmi_pll_compute_mpllb()
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