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Searched refs:SNPS_PHY_MPLLB_FREQ_VCO (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_snps_phy.c109 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 2),
135 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 3),
156 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 3),
344 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 2),
481 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 3),
511 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 3),
542 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 0),
572 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 0),
602 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 0),
632 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, 0),
[all …]
A Dintel_snps_phy_regs.h33 #define SNPS_PHY_MPLLB_FREQ_VCO REG_GENMASK(25, 24) macro
A Dintel_snps_hdmi_pll.c275 REG_FIELD_PREP(SNPS_PHY_MPLLB_FREQ_VCO, pll_params.ana_freq_vco); in intel_snps_hdmi_pll_compute_mpllb()

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