Home
last modified time | relevance | path

Searched refs:SNPS_PHY_MPLLB_HDMI_DIV (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_snps_phy.c426 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
455 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
485 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
515 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
546 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
576 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
606 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
636 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
666 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
696 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, 1),
[all …]
A Dintel_snps_phy_regs.h60 #define SNPS_PHY_MPLLB_HDMI_DIV REG_GENMASK(17, 15) macro
A Dintel_snps_hdmi_pll.c279 REG_FIELD_PREP(SNPS_PHY_MPLLB_HDMI_DIV, pll_params.hdmi_div); in intel_snps_hdmi_pll_compute_mpllb()

Completed in 28 milliseconds