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Searched refs:SPRCTL (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/i915/display/
A Dintel_sprite.c865 intel_de_write_fw(display, SPRCTL(pipe), sprctl); in ivb_sprite_update_arm()
880 intel_de_write_fw(display, SPRCTL(pipe), 0); in ivb_sprite_disable_arm()
893 error->ctl = intel_de_read(display, SPRCTL(crtc->pipe)); in ivb_sprite_capture_error()
912 ret = intel_de_read(display, SPRCTL(plane->pipe)) & SPRITE_ENABLE; in ivb_sprite_get_hw_state()
A Dintel_sprite_regs.h118 #define SPRCTL(pipe) _MMIO_PIPE(pipe, _SPRA_CTL, _SPRB_CTL) macro
/drivers/gpu/drm/i915/gvt/
A Ddisplay.c205 vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE; in emulate_monitor_status_change()
519 vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE; in emulate_monitor_status_change()
A Dcmd_parser.c1324 info->ctrl_reg = SPRCTL(info->pipe); in gen8_decode_mi_display_flip()
A Dhandlers.c1057 if (vgpu_vreg_t(vgpu, SPRCTL(pipe)) & PLANE_CTL_ASYNC_FLIP) in spr_surf_mmio_write()
/drivers/gpu/drm/i915/
A Dintel_gvt_mmio_table.c202 MMIO_D(SPRCTL(PIPE_A)); in iterate_generic_mmio()
215 MMIO_D(SPRCTL(PIPE_B)); in iterate_generic_mmio()
228 MMIO_D(SPRCTL(PIPE_C)); in iterate_generic_mmio()

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