| /drivers/gpu/drm/amd/display/dc/dcn301/ |
| A D | dcn301_panel_cntl.h | 34 SRIR(PWRSEQ_CNTL, CNTL, PANEL_PWRSEQ, id), \
35 SRIR(PWRSEQ_STATE, STATE, PANEL_PWRSEQ, id), \
36 SRIR(PWRSEQ_REF_DIV, REF_DIV, PANEL_PWRSEQ, id), \
37 SRIR(BL_PWM_CNTL, CNTL, BL_PWM, id), \
38 SRIR(BL_PWM_CNTL2, CNTL2, BL_PWM, id), \
39 SRIR(BL_PWM_PERIOD_CNTL, PERIOD_CNTL, BL_PWM, id), \
40 SRIR(BL_PWM_GRP1_REG_LOCK, GRP1_REG_LOCK, BL_PWM, id)
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| A D | dcn201_resource.c | 259 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| A D | dcn21_resource.c | 109 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| A D | dcn301_resource.c | 128 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| A D | dcn316_resource.c | 160 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| A D | dcn314_resource.c | 157 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| A D | dcn31_resource.c | 140 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| A D | dcn321_resource.c | 152 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| A D | dcn35_resource.c | 168 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| A D | dcn315_resource.c | 174 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| A D | dcn351_resource.c | 148 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| A D | dcn36_resource.c | 153 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| A D | dcn30_resource.c | 129 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| A D | dcn401_resource.c | 139 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| A D | dcn20_resource.c | 145 #define SRIR(var_name, reg_name, block, id)\ macro
|
| /drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| A D | dcn32_resource.c | 152 #define SRIR(var_name, reg_name, block, id)\ macro
|