Searched refs:SWRST (Results 1 – 5 of 5) sorted by relevance
| /drivers/net/ethernet/apple/ |
| A D | mace.h | 114 #define SWRST 0x01 /* software reset */ macro
|
| A D | macmace.c | 272 mb->biucc = SWRST; in mace_reset()
273 if (mb->biucc & SWRST) { in mace_reset()
|
| A D | mace.c | 325 out_8(&mb->biucc, SWRST); in mace_reset()
326 if (in_8(&mb->biucc) & SWRST) { in mace_reset()
|
| /drivers/spi/ |
| A D | spi-atmel.c | 1493 spi_writel(as, CR, SPI_BIT(SWRST)); in atmel_spi_init()
1494 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ in atmel_spi_init()
1661 spi_writel(as, CR, SPI_BIT(SWRST)); in atmel_spi_probe()
1662 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ in atmel_spi_probe()
1692 spi_writel(as, CR, SPI_BIT(SWRST)); in atmel_spi_remove()
1693 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */ in atmel_spi_remove()
|
| /drivers/mtd/nand/raw/ |
| A D | nuvoton-ma35d1-nand-controller.c | 32 #define SWRST BIT(0) macro
517 writel(readl(nand->regs + MA35_NFI_REG_NANDCTL) | SWRST, in ma35_nand_do_read()
716 reg |= SWRST; in ma35_hw_init()
|
Completed in 16 milliseconds