| /drivers/media/platform/qcom/iris/ |
| A D | iris_vpu3x.c | 51 #define SW_RESET BIT(0) macro
186 val |= SW_RESET; in iris_vpu33_power_off_controller()
204 val &= ~SW_RESET; in iris_vpu33_power_off_controller()
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| /drivers/phy/qualcomm/ |
| A D | phy-qcom-qmp.h | 62 #define SW_RESET BIT(0) macro
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| A D | phy-qcom-qmp-pcie-msm8996.c | 293 qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET], SW_RESET); in qmp_pcie_msm8996_serdes_init()
377 SW_RESET); in qmp_pcie_msm8996_com_exit()
448 qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_pcie_msm8996_power_on()
480 qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_pcie_msm8996_power_off()
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| A D | phy-qcom-qmp-usb-legacy.c | 763 qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET); in qmp_usb_legacy_init_dp_com()
854 qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_usb_legacy_power_on()
883 qphy_setbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_usb_legacy_power_off()
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| A D | phy-qcom-qmp-usbc.c | 548 qphy_clrbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_usbc_power_on()
577 qphy_setbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_usbc_power_off()
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| A D | phy-qcom-qmp-usb.c | 1807 qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_usb_power_on()
1836 qphy_setbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_usb_power_off()
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| A D | phy-qcom-qmp-combo.c | 3047 qphy_clrbits(com, QPHY_V3_DP_COM_SW_RESET, SW_RESET); in qmp_combo_com_init()
3195 qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_combo_usb_power_on()
3224 qphy_setbits(qmp->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); in qmp_combo_usb_power_off()
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| /drivers/watchdog/ |
| A D | asm9260_wdt.c | 50 SW_RESET, enumerator
277 priv->mode = SW_RESET; in asm9260_wdt_get_dt_mode()
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| /drivers/clk/qcom/ |
| A D | gdsc.h | 64 #define SW_RESET BIT(3) macro
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| A D | gpucc-sdm660.c | 254 .flags = CLAMP_IO | SW_RESET | AON_RESET | NO_RET_PERIPH,
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| A D | gpucc-msm8998.c | 270 .flags = CLAMP_IO | SW_RESET | AON_RESET | NO_RET_PERIPH,
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| A D | gpucc-qcm2290.c | 317 .flags = CLAMP_IO | AON_RESET | SW_RESET,
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| A D | gpucc-sm6375.c | 380 .flags = CLAMP_IO | SW_RESET | AON_RESET,
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| A D | gpucc-sar2130p.c | 417 .flags = CLAMP_IO | AON_RESET | SW_RESET,
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| A D | gpucc-sm6115.c | 417 .flags = CLAMP_IO | SW_RESET | VOTABLE,
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| A D | gpucc-sm8650.c | 565 .flags = CLAMP_IO | AON_RESET | SW_RESET | POLL_CFG_GDSCR,
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| A D | gpucc-x1e80100.c | 557 .flags = CLAMP_IO | AON_RESET | SW_RESET | POLL_CFG_GDSCR,
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| A D | gdsc.c | 267 if (sc->flags & SW_RESET) { in gdsc_enable()
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| A D | gpucc-sm4450.c | 694 .flags = CLAMP_IO | AON_RESET | SW_RESET | POLL_CFG_GDSCR,
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| A D | gpucc-sm8450.c | 692 .flags = CLAMP_IO | AON_RESET | SW_RESET | POLL_CFG_GDSCR,
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| /drivers/net/dsa/microchip/ |
| A D | lan937x_reg.h | 53 #define SW_RESET BIT(1) macro
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| A D | lan937x_main.c | 351 ret = lan937x_cfg(dev, REG_SW_OPERATION, SW_RESET, true); in lan937x_reset_switch()
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| A D | ksz9477_reg.h | 149 #define SW_RESET BIT(1) macro
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| A D | ksz9477.c | 354 ksz_cfg(dev, REG_SW_OPERATION, SW_RESET, true); in ksz9477_reset_switch()
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| /drivers/net/wireless/intel/ipw2x00/ |
| A D | ipw2100.h | 301 SW_RESET, enumerator
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