Home
last modified time | relevance | path

Searched refs:SYS (Results 1 – 15 of 15) sorted by relevance

/drivers/clk/at91/
A Dsama7g5.c378 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), },
395 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(DDR, DIV0),
403 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), },
565 .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0),
798 .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0),
808 .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0),
818 .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0),
828 .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0),
838 .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0),
848 .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(IMG, DIV0),
[all …]
A Dsama7d65.c465 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), },
474 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(DDR, DIV0), },
482 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(DDR, DIV0), },
491 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), },
499 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), },
508 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), },
516 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), },
523 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), },
530 .ep = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), },
973 .pp = { PLL_IDS_TO_ARR_ENTRY(SYS, DIV0), PLL_IDS_TO_ARR_ENTRY(BAUD, DIV0), },
[all …]
/drivers/net/ethernet/mscc/
A Docelot_stats.c929 WARN(ocelot->map[SYS][last & REG_MASK] >= ocelot->map[SYS][layout[i].reg & REG_MASK], in ocelot_prepare_stats_regions()
931 last, ocelot->map[SYS][last & REG_MASK], in ocelot_prepare_stats_regions()
932 layout[i].reg, ocelot->map[SYS][layout[i].reg & REG_MASK]); in ocelot_prepare_stats_regions()
935 if (region && ocelot->map[SYS][layout[i].reg & REG_MASK] == in ocelot_prepare_stats_regions()
936 ocelot->map[SYS][last & REG_MASK] + 4) { in ocelot_prepare_stats_regions()
A Docelot_vsc7514.c251 { SYS, "sys" }, in mscc_ocelot_probe()
A Dvsc7514_regs.c429 [SYS] = vsc7514_sys_regmap,
/drivers/net/dsa/ocelot/
A Docelot_ext.c42 [SYS] = "sys",
A Dseville_vsc9953.c453 [SYS] = vsc9953_sys_regmap,
486 [SYS] = "sys",
A Dfelix_vsc9959.c512 [SYS] = vsc9959_sys_regmap,
542 [SYS] = "sys",
/drivers/media/usb/dvb-usb-v2/
A Drtl28xxu.h42 #define SYS 0x0200 macro
/drivers/gpu/drm/xe/
A DKconfig.debug66 bool "Enable passing SYS/VRAM addresses to user space"
/drivers/clk/nxp/
A Dclk-lpc32xx.c203 LPC32XX_CLK_DEFINE(SYS, "sys", CLK_IGNORE_UNUSED,
1327 LPC32XX_DEFINE_MUX(SYS, SYSCLK_CTRL, 0, 0x1, NULL, CLK_MUX_READ_ONLY),
/drivers/mmc/host/
A DKconfig715 tristate "DMA for SDHI SD/SDIO controllers using SYS-DMAC"
720 using SYS-DMAC via DMA Engine. This supports the controllers
/drivers/pinctrl/tegra/
A Dpinctrl-tegra210.c1442 …PINGROUP(clk_req, SYS, RSVD1, RSVD2, RSVD3, 0x316c, N, N, N, Y,…
A Dpinctrl-tegra124.c1920 …PINGROUP(kb_row3_pr3, KBC, DISPLAYA, SYS, DISPLAYB, 0x32c8, N, N…
/drivers/clk/qcom/
A DKconfig206 CMN PLL consumes the AHB/SYS clocks from GCC and supplies

Completed in 50 milliseconds