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Searched refs:TMDS_DCBALANCER_CONTROL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/display/dc/dio/dcn301/
A Ddcn301_dio_link_encoder.h36 SRI(TMDS_DCBALANCER_CONTROL, DIG, id), \
/drivers/gpu/drm/amd/display/dc/dio/dcn30/
A Ddcn30_dio_link_encoder.h35 SRI(TMDS_DCBALANCER_CONTROL, DIG, id), \
/drivers/gpu/drm/amd/display/dc/dio/dcn10/
A Ddcn10_link_encoder.h160 uint32_t TMDS_DCBALANCER_CONTROL; member
/drivers/gpu/drm/amd/display/dc/resource/dcn32/
A Ddcn32_resource.h326 SRI_ARR(TMDS_DCBALANCER_CONTROL, DIG, id), SRI_ARR(DP_CONFIG, DP, id), \

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