| /drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_stream_encoder.h | 284 SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\
292 SE_SF(TMDS_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\
300 SE_SF(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\
310 SE_SF(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\
477 uint8_t TMDS_PIXEL_ENCODING; member
609 uint32_t TMDS_PIXEL_ENCODING; member
|
| A D | dce_stream_encoder.c | 510 REG_UPDATE(TMDS_CNTL, TMDS_PIXEL_ENCODING, 1); in dce110_stream_encoder_set_stream_attribute_helper()
513 REG_UPDATE(TMDS_CNTL, TMDS_PIXEL_ENCODING, 0); in dce110_stream_encoder_set_stream_attribute_helper()
520 REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 1); in dce110_stream_encoder_set_stream_attribute_helper()
523 REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 0); in dce110_stream_encoder_set_stream_attribute_helper()
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn35/ |
| A D | dcn35_dio_stream_encoder.c | 221 REG_UPDATE(HDMI_CONTROL, TMDS_PIXEL_ENCODING, 1); in enc35_stream_encoder_hdmi_set_stream_attribute()
224 REG_UPDATE(HDMI_CONTROL, TMDS_PIXEL_ENCODING, 0); in enc35_stream_encoder_hdmi_set_stream_attribute()
|
| A D | dcn35_dio_stream_encoder.h | 171 SE_SF(DIG0_HDMI_CONTROL, TMDS_PIXEL_ENCODING, mask_sh),\
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn401/ |
| A D | dcn401_dio_stream_encoder.c | 849 REG_UPDATE(HDMI_CONTROL, TMDS_PIXEL_ENCODING, 1); in enc401_stream_encoder_set_stream_attribute_helper()
852 REG_UPDATE(HDMI_CONTROL, TMDS_PIXEL_ENCODING, 0); in enc401_stream_encoder_set_stream_attribute_helper()
|
| A D | dcn401_dio_stream_encoder.h | 93 SE_SF(DIG1_HDMI_CONTROL, TMDS_PIXEL_ENCODING, mask_sh),\
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn32/ |
| A D | dcn32_dio_stream_encoder.h | 91 SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| A D | dcn10_stream_encoder.c | 470 REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 1); in enc1_stream_encoder_set_stream_attribute_helper()
473 REG_UPDATE(DIG_FE_CNTL, TMDS_PIXEL_ENCODING, 0); in enc1_stream_encoder_set_stream_attribute_helper()
|
| A D | dcn10_stream_encoder.h | 278 SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\
494 type TMDS_PIXEL_ENCODING;\
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn314/ |
| A D | dcn314_dio_stream_encoder.h | 170 SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\
|
| /drivers/gpu/drm/amd/display/dc/dio/dcn30/ |
| A D | dcn30_dio_stream_encoder.h | 172 SE_SF(DIG0_DIG_FE_CNTL, TMDS_PIXEL_ENCODING, mask_sh),\
|
| /drivers/gpu/drm/amd/include/asic_reg/dce/ |
| A D | dce_11_0_enum.h | 2168 typedef enum TMDS_PIXEL_ENCODING { enum
2171 } TMDS_PIXEL_ENCODING; typedef
|
| A D | dce_11_2_enum.h | 2631 typedef enum TMDS_PIXEL_ENCODING { enum
2634 } TMDS_PIXEL_ENCODING; typedef
|
| /drivers/gpu/drm/amd/include/ |
| A D | soc24_enum.h | 7149 typedef enum TMDS_PIXEL_ENCODING { enum
7152 } TMDS_PIXEL_ENCODING; typedef
|
| A D | vega10_enum.h | 4136 typedef enum TMDS_PIXEL_ENCODING { enum
4139 } TMDS_PIXEL_ENCODING; typedef
|
| A D | navi10_enum.h | 6533 typedef enum TMDS_PIXEL_ENCODING { enum
6536 } TMDS_PIXEL_ENCODING; typedef
|
| A D | soc21_enum.h | 7419 typedef enum TMDS_PIXEL_ENCODING { enum
7422 } TMDS_PIXEL_ENCODING; typedef
|