| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| A D | dcn30_clk_mgr.c | 111 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_init_clocks()
197 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_update_clocks()
327 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_notify_wm_ranges()
358 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_hard_min_memclk()
379 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_hard_max_memclk()
390 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_max_memclk()
399 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_set_min_memclk()
409 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_get_memclk_states_from_smu()
432 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_is_smu_present()
457 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn3_enable_pme_wa()
[all …]
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| A D | dcn30m_clk_mgr.c | 33 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn30m_set_smartmux_switch()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
| A D | dce_clk_mgr.c | 131 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_get_dp_ref_freq_khz()
157 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce12_get_dp_ref_freq_khz()
198 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_get_required_clocks_state()
233 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_set_clock()
406 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_update_clocks()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| A D | dcn32_clk_mgr.c | 164 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_init_clocks()
476 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_get_dispclk_from_dentist()
625 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_update_clocks()
875 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_dump_clk_registers()
971 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_notify_wm_ranges()
996 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_set_hard_min_memclk()
1017 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_set_hard_max_memclk()
1028 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_get_memclk_states_from_smu()
1095 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_enable_pme_wa()
1105 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn32_is_smu_present()
[all …]
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| A D | dcn401_clk_mgr.c | 218 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn401_init_clocks()
316 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn401_is_dc_mode_present()
336 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn401_dump_clk_registers()
1304 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn401_notify_wm_ranges()
1329 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn401_set_hard_min_memclk()
1362 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn401_get_hard_min_memclk()
1369 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn401_get_hard_min_fclk()
1377 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn401_get_memclk_states_from_smu()
1455 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn401_enable_pme_wa()
1465 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn401_is_smu_present()
[all …]
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ |
| A D | dce60_clk_mgr.c | 85 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce60_get_dp_ref_freq_khz()
124 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce60_update_clocks()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| A D | rn_clk_mgr.c | 89 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_set_low_power_state()
135 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_update_clocks()
286 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_dump_clk_registers_internal()
440 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_enable_pme_wa()
515 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_notify_wm_ranges()
547 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_notify_link_rate_change()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| A D | dcn20_clk_mgr.c | 220 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_update_clocks()
347 struct clk_mgr_internal *clk_mgr_int = TO_CLK_MGR_INTERNAL(clk_mgr); in dcn2_update_clocks_fpga()
413 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_enable_pme_wa()
427 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_read_clocks_from_hw_dentist()
495 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn2_notify_link_rate_change()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| A D | dcn35_clk_mgr.c | 201 struct clk_mgr_internal *clk_mgr_internal = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_disable_otg_wa()
345 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_notify_host_router_bw()
382 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_update_clocks()
565 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_enable_pme_wa()
597 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_is_spll_ssc_enabled()
625 struct clk_mgr_internal *clk_mgr_int = TO_CLK_MGR_INTERNAL(clk_mgr); in dcn35_init_clocks()
804 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_notify_wm_ranges()
1089 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_exit_low_power_state()
1098 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn35_is_ips_supported()
1114 struct clk_mgr_internal *clk_mgr_int = TO_CLK_MGR_INTERNAL(clk_mgr); in dcn35_update_clocks_fpga()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
| A D | dce112_clk_mgr.c | 72 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce112_set_clock()
195 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce112_update_clocks()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| A D | rv1_clk_mgr.c | 191 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_update_clocks()
293 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_enable_pme_wa()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | vg_clk_mgr.c | 99 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in vg_update_clocks()
218 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in vg_dump_clk_registers_internal()
372 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in vg_enable_pme_wa()
444 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in vg_notify_wm_ranges()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_clk_mgr.c | 176 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_is_spll_ssc_enabled()
186 struct clk_mgr_internal *clk_mgr_int = TO_CLK_MGR_INTERNAL(clk_mgr); in dcn314_init_clocks()
210 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_update_clocks()
364 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_enable_pme_wa()
543 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn314_notify_wm_ranges()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 139 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_update_clocks()
292 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_enable_pme_wa()
479 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_notify_wm_ranges()
636 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn31_set_low_power_state()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/ |
| A D | dce120_clk_mgr.c | 88 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce12_update_clocks()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| A D | dcn316_clk_mgr.c | 130 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn316_enable_pme_wa()
140 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn316_update_clocks()
405 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn316_notify_wm_ranges()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| A D | dcn315_clk_mgr.c | 130 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn315_update_clocks()
440 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn315_notify_wm_ranges()
588 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn315_enable_pme_wa()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| A D | dcn201_clk_mgr.c | 88 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dcn201_update_clocks()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| A D | dce110_clk_mgr.c | 253 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce11_update_clocks()
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | clk_mgr_internal.h | 69 #define TO_CLK_MGR_INTERNAL(clk_mgr)\ macro
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/ |
| A D | clk_mgr.c | 388 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dc_destroy_clk_mgr()
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