| /drivers/tty/vt/ |
| A D | cp437.uni | 20 0x04 U+2666 U+25c6 31 0x0f U+263c U+00a4 32 0x10 U+25b6 U+25ba 33 0x11 U+25c0 U+25c4 54 0x22 U+0022 U+00a8 85 0x41 U+0041 U+00c0 U+00c1 U+00c2 U+00c3 89 0x45 U+0045 U+00c8 U+00ca U+00cb 93 0x49 U+0049 U+00cc U+00cd U+00ce U+00cf 99 0x4f U+004f U+00d2 U+00d3 U+00d4 U+00d5 105 0x55 U+0055 U+00d9 U+00da U+00db [all …]
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| A D | ucs_recompose_table.h_shipped | 43 … 0x0055, 0x0300, 0x00D9 }, /* LATIN CAPITAL LETTER U + COMBINING GRAVE ACCENT = LATIN CAPITAL LETT… 44 … 0x0055, 0x0301, 0x00DA }, /* LATIN CAPITAL LETTER U + COMBINING ACUTE ACCENT = LATIN CAPITAL LETT… 45 …0055, 0x0302, 0x00DB }, /* LATIN CAPITAL LETTER U + COMBINING CIRCUMFLEX ACCENT = LATIN CAPITAL LE… 46 …{ 0x0055, 0x0308, 0x00DC }, /* LATIN CAPITAL LETTER U + COMBINING DIAERESIS = LATIN CAPITAL LETTER… 69 …{ 0x0075, 0x0300, 0x00F9 }, /* LATIN SMALL LETTER U + COMBINING GRAVE ACCENT = LATIN SMALL LETTER … 70 …{ 0x0075, 0x0301, 0x00FA }, /* LATIN SMALL LETTER U + COMBINING ACUTE ACCENT = LATIN SMALL LETTER … 71 … 0x0075, 0x0302, 0x00FB }, /* LATIN SMALL LETTER U + COMBINING CIRCUMFLEX ACCENT = LATIN SMALL LET… 72 …{ 0x0075, 0x0308, 0x00FC }, /* LATIN SMALL LETTER U + COMBINING DIAERESIS = LATIN SMALL LETTER U W… 90 …423, 0x0306, 0x040E }, /* CYRILLIC CAPITAL LETTER U + COMBINING BREVE = CYRILLIC CAPITAL LETTER SH… 92 …0x0443, 0x0306, 0x045E }, /* CYRILLIC SMALL LETTER U + COMBINING BREVE = CYRILLIC SMALL LETTER SHO…
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| A D | ucs_fallback_table.h_shipped | 110 { 0xDC, 0x55 }, /* LATIN CAPITAL LETTER U WITH DIAERESIS -> 'U' */ 231 { 0x68, 0x55 }, /* LATIN CAPITAL LETTER U WITH TILDE -> 'U' */ 233 { 0x6A, 0x55 }, /* LATIN CAPITAL LETTER U WITH MACRON -> 'U' */ 235 { 0x6C, 0x55 }, /* LATIN CAPITAL LETTER U WITH BREVE -> 'U' */ 295 { 0xAF, 0x55 }, /* LATIN CAPITAL LETTER U WITH HORN -> 'U' */ 315 { 0xD3, 0x55 }, /* LATIN CAPITAL LETTER U WITH CARON -> 'U' */ 413 { 0x44, 0x55 }, /* LATIN CAPITAL LETTER U BAR -> 'U' */ 667 { 0x23, 0x55 }, /* CYRILLIC CAPITAL LETTER U -> 'U' */ 2110 { 0x1C, 0x55 }, /* LATIN LETTER SMALL CAPITAL U -> 'U' */ 2136 { 0x41, 0x55 }, /* MODIFIER LETTER CAPITAL U -> 'U' */ [all …]
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| /drivers/comedi/drivers/ni_routing/ni_route_values/ |
| A D | ni_eseries.c | 230 [B(NI_PFI(0))] = U(1), 231 [B(NI_PFI(1))] = U(2), 232 [B(NI_PFI(2))] = U(3), 233 [B(NI_PFI(3))] = U(4), 234 [B(NI_PFI(4))] = U(5), 235 [B(NI_PFI(5))] = U(6), 236 [B(NI_PFI(6))] = U(7), 237 [B(NI_PFI(7))] = U(8), 238 [B(NI_PFI(8))] = U(9), 248 [B(PXI_Star)] = U(17), [all …]
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| A D | ni_660x.c | 122 [B(NI_PFI(11))] = U(9), 123 [B(NI_PFI(15))] = U(8), 124 [B(NI_PFI(19))] = U(7), 125 [B(NI_PFI(23))] = U(6), 126 [B(NI_PFI(27))] = U(5), 127 [B(NI_PFI(31))] = U(4), 128 [B(NI_PFI(35))] = U(3), 145 [B(NI_PFI(11))] = U(9), 146 [B(NI_PFI(15))] = U(8), 147 [B(NI_PFI(19))] = U(7), [all …]
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| A D | ni_mseries.c | 810 [B(NI_PFI(0))] = U(1), 811 [B(NI_PFI(1))] = U(2), 812 [B(NI_PFI(2))] = U(3), 813 [B(NI_PFI(3))] = U(4), 814 [B(NI_PFI(4))] = U(5), 815 [B(NI_PFI(5))] = U(6), 816 [B(NI_PFI(6))] = U(7), 817 [B(NI_PFI(7))] = U(8), 818 [B(NI_PFI(8))] = U(9), 846 [B(NI_PFI(0))] = U(1), [all …]
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| /drivers/gpu/drm/imagination/ |
| A D | pvr_rogue_cr_defs.h | 22 #define ROGUE_CR_PBE_INDIRECT_ADDRESS_SHIFT 0U 215 #define ROGUE_CR_CLK_CTRL_ISP_SHIFT 0U 330 #define ROGUE_CR_CLK_STATUS_ISP_SHIFT 0U 352 #define ROGUE_CR_CORE_ID_CONFIG_SHIFT 0U 670 #define ROGUE_CR_SOFT_RESET_USC_SHIFT 0U 950 #define ROGUE_CR_TIMER_VALUE_SHIFT 0U 2213 #define ROGUE_CR_PPP_CHECKSUM_SHIFT 0U 2958 #define ROGUE_CR_SCRATCH0_DATA_SHIFT 0U 2964 #define ROGUE_CR_SCRATCH1_DATA_SHIFT 0U 2970 #define ROGUE_CR_SCRATCH2_DATA_SHIFT 0U [all …]
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| A D | pvr_rogue_fwif_stream.h | 53 #define PVR_STREAM_EXTHDR_TYPE_GEOM0 0U 55 #define PVR_STREAM_EXTHDR_GEOM0_BRN49927 BIT(0U) 62 #define PVR_STREAM_EXTHDR_TYPE_FRAG0 0U 64 #define PVR_STREAM_EXTHDR_FRAG0_BRN47217 BIT(0U) 72 #define PVR_STREAM_EXTHDR_TYPE_COMPUTE0 0U 74 #define PVR_STREAM_EXTHDR_COMPUTE0_BRN49927 BIT(0U)
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| A D | pvr_rogue_meta.h | 48 #define META_CR_TXUXXRXDT_OFFSET (META_CR_CTRLREG_BASE(0U) + 0x0000FFF0U) 49 #define META_CR_TXUXXRXRQ_OFFSET (META_CR_CTRLREG_BASE(0U) + 0x0000FFF8U) 95 (META_CR_CTRLREG_BASE(0U) + META_CR_COREREG_ENABLE) 97 (META_CR_CTRLREG_BASE(0U) + META_CR_COREREG_STATUS) 98 #define META_CR_T0DEFR_OFFSET (META_CR_CTRLREG_BASE(0U) + META_CR_COREREG_DEFR) 100 (META_CR_CTRLREG_BASE(0U) + META_CR_COREREG_PRIVEXT) 170 #define ROGUE_META_LDR_BLK_IS_COMMENT(x) (((x) & ROGUE_META_LDR_COMMENT_TYPE_MASK) != 0U)
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| A D | pvr_rogue_mmu_defs.h | 104 #define ROGUE_MMUCTRL_PT_DATA_VALID_SHIFT (0U) 121 #define ROGUE_MMUCTRL_PD_DATA_VALID_SHIFT (0U) 132 #define ROGUE_MMUCTRL_PC_DATA_VALID_SHIFT (0U)
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| /drivers/net/ethernet/aquantia/atlantic/hw_atl/ |
| A D | hw_atl_a0.c | 23 .irq_mask = ~0U, \ 128 u32 buff_size = 0U; in hw_atl_a0_hw_qos_set() 129 u32 tc = 0U; in hw_atl_a0_hw_qos_set() 188 unsigned int i = 0U; in hw_atl_a0_hw_rss_hash_set() 219 u32 i = 0U; in hw_atl_a0_hw_rss_set() 300 hw_atl_rpfl2_uc_flr_en_set(self, (i == 0U) ? 1U : 0U, i); in hw_atl_a0_hw_init_rx_path() 327 unsigned int h = 0U; in hw_atl_a0_hw_mac_addr_set() 328 unsigned int l = 0U; in hw_atl_a0_hw_mac_addr_set() 712 buff->next = 0U; in hw_atl_a0_hw_ring_rx_receive() 835 itr_rx = 0U; in hw_atl_a0_hw_interrupt_moderation_set() [all …]
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| A D | hw_atl_b0.c | 25 .irq_mask = ~0U, \ 158 u32 tc = 0U; in hw_atl_b0_hw_qos_set() 175 u32 threshold = 0U; in hw_atl_b0_hw_qos_set() 214 unsigned int i = 0U; in hw_atl_b0_hw_rss_hash_set() 245 u32 i = 0U; in hw_atl_b0_hw_rss_set() 503 hw_atl_rpfl2_uc_flr_en_set(self, (i == 0U) ? 1U : 0U, i); in hw_atl_b0_hw_init_rx_path() 916 u8 rx_stat = 0U; in hw_atl_b0_hw_ring_rx_receive() 924 buff->flags = 0U; in hw_atl_b0_hw_ring_rx_receive() 982 buff->next = 0U; in hw_atl_b0_hw_ring_rx_receive() 1186 itr_tx = 0U; in hw_atl_b0_hw_interrupt_moderation_set() [all …]
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| A D | hw_atl_utils.c | 406 (val & 0x100) == 0U, in hw_atl_utils_write_b0_mbox() 479 unsigned int rnd = 0U; in hw_atl_utils_init_ucp() 709 link_status->mbps = 0U; in hw_atl_utils_mpi_get_link_status() 748 u32 h = 0U; in hw_atl_utils_get_mac_permanent() 749 u32 l = 0U; in hw_atl_utils_get_mac_permanent() 766 mac_addr[0] = 0U; in hw_atl_utils_get_mac_permanent() 767 mac_addr[1] = 0U; in hw_atl_utils_get_mac_permanent() 800 unsigned int ret = 0U; in hw_atl_utils_mbps_2_speed_index() 820 ret = 0U; in hw_atl_utils_mbps_2_speed_index() 834 u32 chip_features = 0U; in hw_atl_utils_hw_chip_features_init() [all …]
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| A D | hw_atl_llh.c | 285 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, in hw_atl_itr_irq_map_rx_set() 286 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, in hw_atl_itr_irq_map_rx_set() 287 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U, in hw_atl_itr_irq_map_rx_set() 288 8U, 0U, 8U, 0U, 8U, 0U, 8U, 0U in hw_atl_itr_irq_map_rx_set() 861 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U in hw_atl_rpf_rpb_user_priority_tc_map_set() 1235 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, in hw_atl_rpo_lro_max_num_of_descriptors_set() 1236 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, in hw_atl_rpo_lro_max_num_of_descriptors_set() 1237 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U, in hw_atl_rpo_lro_max_num_of_descriptors_set() 1238 0U, 4U, 8U, 12U, 16U, 20U, 24U, 28U in hw_atl_rpo_lro_max_num_of_descriptors_set() 1750 0U); in hw_atl_rpfl3l4_ipv6_dest_addr_clear() [all …]
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| /drivers/media/i2c/ccs/ |
| A D | ccs-regs.h | 24 #define CCS_PIXEL_ORDER_GRBG 0U 33 #define CCS_MIPI_CCS_VERSION_MINOR_SHIFT 0U 42 #define CCS_MODULE_DATE_PHASE_SHIFT 0U 44 #define CCS_MODULE_DATE_PHASE_TS 0U 139 #define CCS_SOFTWARE_RESET_OFF 0U 163 #define CCS_GAIN_MODE_GLOBAL 0U 211 #define CCS_PLL_MODE_SHIFT 0U 213 #define CCS_PLL_MODE_SINGLE 0U 238 #define CCS_MONOCHROME_EN_ENABLED 0U 249 #define CCS_COMPRESSION_MODE_NONE 0U [all …]
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| /drivers/net/ethernet/aquantia/atlantic/hw_atl2/ |
| A D | hw_atl2.c | 26 .irq_mask = ~0U, \ 167 unsigned int prio = 0U; in hw_atl2_hw_qos_set() 168 u32 tc = 0U; in hw_atl2_hw_qos_set() 180 u32 threshold = 0U; in hw_atl2_hw_qos_set() 369 hw_atl_tdm_tx_dca_en_set(self, 0U); in hw_atl2_hw_init_tx_path() 502 hw_atl_rpfl2_uc_flr_en_set(self, (i == 0U) ? 1U : 0U, i); in hw_atl2_hw_init_rx_path() 591 (1U << 0x17)), 0U); in hw_atl2_hw_init() 638 for (cfg->mc_list_count = 0U; in hw_atl2_hw_multicast_list_set() 668 unsigned int i = 0U; in hw_atl2_hw_interrupt_moderation_set() 745 itr_tx = 0U; in hw_atl2_hw_interrupt_moderation_set() [all …]
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| /drivers/net/ethernet/aquantia/atlantic/ |
| A D | aq_vec.c | 31 unsigned int sw_tail_old = 0U; in aq_vec_poll() 34 unsigned int i = 0U; in aq_vec_poll() 41 for (i = 0U; self->tx_rings > i; ++i) { in aq_vec_poll() 132 unsigned int i = 0U; in aq_vec_ring_alloc() 184 unsigned int i = 0U; in aq_vec_init() 217 &ring[AQ_VEC_RX_ID], 0U); in aq_vec_init() 229 unsigned int i = 0U; in aq_vec_start() 254 unsigned int i = 0U; in aq_vec_stop() 271 unsigned int i = 0U; in aq_vec_deinit() 300 unsigned int i = 0U; in aq_vec_ring_free() [all …]
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| A D | aq_cfg.h | 18 #define AQ_CFG_IS_POLLING_DEF 0U 20 #define AQ_CFG_FORCE_INTX 0U 42 #define AQ_CFG_RX_PAGEORDER 0U 54 #define AQ_CFG_RSS_BASE_CPU_NUM_DEF 0U
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| A D | aq_nic.c | 133 cfg->is_rss = 0U; in aq_nic_cfg_start() 268 unsigned int i = 0U; in aq_nic_polling_timer_cb() 408 unsigned int i = 0U; in aq_nic_init() 476 unsigned int i = 0U; in aq_nic_start() 590 dx_buff->flags = 0U; in aq_nic_map_xdp() 694 dx_buff->flags = 0U; in aq_nic_map_skb() 939 unsigned int i = 0U; in aq_nic_set_multicast_list() 1024 unsigned int i = 0U; in aq_nic_get_stats() 1277 u32 rate = 0U; in aq_nic_set_link_ksettings() 1389 unsigned int i = 0U; in aq_nic_stop() [all …]
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| /drivers/media/pci/intel/ipu3/ |
| A D | ipu3-cio2.h | 42 #define CIO2_PAD_SINK 0U 144 #define CIO2_INT_EXT_OE_DMAOE_SHIFT 0U 166 #define CIO2_REG_DMA_DBG_DMA_INDEX_SHIFT 0U 176 #define CIO2_PBM_WMCTRL1_MIN_2CK_SHIFT 0U 185 #define CIO2_PBM_WMCTRL2_HWM_2CK_SHIFT 0U 216 #define CIO2_LTRVAL02_VAL_SHIFT 0U 233 #define CIO2_CDMARI_FBPT_RP_SHIFT 0U 236 #define CIO2_CDMAC0_FBPT_LEN_SHIFT 0U 246 #define CIO2_CDMAC1_LINENUMINT_SHIFT 0U 250 #define CIO2_PXM_PXF_FMT_CFG_SID0_SHIFT 0U [all …]
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| /drivers/gpu/drm/etnaviv/ |
| A D | etnaviv_hwdb.c | 139 .product_id = ~0U, 140 .customer_id = ~0U, 170 .product_id = ~0U, 171 .customer_id = ~0U, 172 .eco_id = ~0U, 277 etnaviv_chip_identities[i].product_id == ~0U) && in etnaviv_fill_identity_from_hwdb() 279 etnaviv_chip_identities[i].customer_id == ~0U) && in etnaviv_fill_identity_from_hwdb() 281 etnaviv_chip_identities[i].eco_id == ~0U)) { in etnaviv_fill_identity_from_hwdb()
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| /drivers/staging/media/ipu7/abi/ |
| A D | ipu7_fw_common_abi.h | 14 #define IA_GOFO_ADDR_NULL (0U) 38 #define TLV_TYPE_PADDING (0U) 62 #define IA_GOFO_MSG_ERR_OK (0U) 64 #define IA_GOFO_MSG_ERR_GROUP_UNSPECIFIED (0U) 145 #define IA_GOFO_MSG_LOG_DOC_FMT_ID_MIN (0U) 171 #define IA_GOFO_MSG_ABI_OUT_ACK_QUEUE_ID (0U)
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| /drivers/thunderbolt/ |
| A D | test.c | 2041 KUNIT_EXPECT_EQ(test, path->hops[0].nfc_credits, 0U); in tb_test_credit_alloc_legacy_not_bonded() 2043 KUNIT_EXPECT_EQ(test, path->hops[1].nfc_credits, 0U); in tb_test_credit_alloc_legacy_not_bonded() 2048 KUNIT_EXPECT_EQ(test, path->hops[0].nfc_credits, 0U); in tb_test_credit_alloc_legacy_not_bonded() 2050 KUNIT_EXPECT_EQ(test, path->hops[1].nfc_credits, 0U); in tb_test_credit_alloc_legacy_not_bonded() 2074 KUNIT_EXPECT_EQ(test, path->hops[0].nfc_credits, 0U); in tb_test_credit_alloc_legacy_bonded() 2076 KUNIT_EXPECT_EQ(test, path->hops[1].nfc_credits, 0U); in tb_test_credit_alloc_legacy_bonded() 2081 KUNIT_EXPECT_EQ(test, path->hops[0].nfc_credits, 0U); in tb_test_credit_alloc_legacy_bonded() 2083 KUNIT_EXPECT_EQ(test, path->hops[1].nfc_credits, 0U); in tb_test_credit_alloc_legacy_bonded() 2107 KUNIT_EXPECT_EQ(test, path->hops[0].nfc_credits, 0U); in tb_test_credit_alloc_pcie() 2109 KUNIT_EXPECT_EQ(test, path->hops[1].nfc_credits, 0U); in tb_test_credit_alloc_pcie() [all …]
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| /drivers/char/hw_random/ |
| A D | mpfs-rng.c | 16 #define CMD_DATA_SIZE 0U 18 #define MBOX_OFFSET 0U 19 #define RESP_OFFSET 0U 35 .resp_status = 0U, in mpfs_rng_read()
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| /drivers/block/zram/ |
| A D | zram_drv.h | 94 #define ZRAM_PRIMARY_COMP 0U 98 #define ZRAM_PRIMARY_COMP 0U 99 #define ZRAM_SECONDARY_COMP 0U
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