| /drivers/media/platform/synopsys/hdmirx/ |
| A D | snps_hdmirx.h | 95 #define LDO_AFE_PROG(x) UPDATE(x, 24, 23)
100 #define REFFREQ_SEL(x) UPDATE(x, 11, 9)
130 #define VS_CNT_THR_QST(x) UPDATE(x, 27, 20)
132 #define HS_POL_QST(x) UPDATE(x, 19, 18)
134 #define VS_POL_QST(x) UPDATE(x, 17, 16)
267 #define UV_WID(x) UPDATE(x, 31, 28)
269 #define Y_WID(x) UPDATE(x, 27, 24)
291 #define LINE_FLAG_NUM(x) UPDATE(x, 31, 16)
293 #define LOCK_FRAME_NUM(x) UPDATE(x, 11, 0)
300 #define EDID_READ_EN(x) UPDATE(x, 8, 8)
[all …]
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| /drivers/phy/rockchip/ |
| A D | phy-rockchip-inno-hdmi.c | 55 #define RK3228_PCLK_VCO_DIV_5(x) UPDATE(x, 5, 5)
57 #define RK3228_PRE_PLL_PRE_DIV(x) UPDATE(x, 4, 0)
83 #define RK3228_POST_PLL_PRE_DIV(x) UPDATE(x, 4, 0)
95 #define RK3228_TMDS_CLK_CH_TA(x) UPDATE(x, 7, 6)
122 #define RK3328_INT_TMDS_CLK(x) UPDATE(x, 7, 4)
123 #define RK3328_INT_TMDS_D2(x) UPDATE(x, 3, 0)
125 #define RK3328_INT_TMDS_D1(x) UPDATE(x, 7, 4)
126 #define RK3328_INT_TMDS_D0(x) UPDATE(x, 3, 0)
134 #define RK3328_PCLK_VCO_DIV_5(x) UPDATE(x, 1, 1)
202 #define RK3328_TERM_RESISTOR_50 UPDATE(0, 2, 1)
[all …]
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| A D | phy-rockchip-inno-dsidphy.c | 51 #define POWER_WORK_ENABLE UPDATE(1, 1, 0)
52 #define POWER_WORK_DISABLE UPDATE(2, 1, 0)
67 #define REG_PREDIV(x) UPDATE(x, 4, 0)
70 #define REG_FBDIV_LO(x) UPDATE(x, 7, 0)
119 #define T_LPX_CNT(x) UPDATE(x, 5, 0)
130 #define T_HS_TRAIL_CNT(x) UPDATE(x, 6, 0)
142 #define T_WAKEUP_CNT_HI(x) UPDATE(x, 1, 0)
148 #define T_CLK_PRE_CNT(x) UPDATE(x, 3, 0)
153 #define T_TA_GO_CNT(x) UPDATE(x, 5, 0)
158 #define T_TA_SURE_CNT(x) UPDATE(x, 5, 0)
[all …]
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| /drivers/gpu/drm/nouveau/dispnv50/ |
| A D | coreca7d.c | 44 PUSH_MTHD(push, NVCA7D, UPDATE, in coreca7d_update()
45 NVDEF(NVCA7D, UPDATE, RELEASE_ELV, TRUE) | in coreca7d_update()
46 NVDEF(NVCA7D, UPDATE, SPECIAL_HANDLING, NONE) | in coreca7d_update()
47 NVDEF(NVCA7D, UPDATE, INHIBIT_INTERRUPTS, FALSE)); in coreca7d_update()
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| A D | core507d.c | 49 PUSH_MTHD(push, NV507D, UPDATE, interlock[NV50_DISP_INTERLOCK_BASE] | in core507d_update()
51 NVDEF(NV507D, UPDATE, NOT_DRIVER_FRIENDLY, FALSE) | in core507d_update()
52 NVDEF(NV507D, UPDATE, NOT_DRIVER_UNFRIENDLY, FALSE) | in core507d_update()
53 NVDEF(NV507D, UPDATE, INHIBIT_INTERRUPTS, FALSE), in core507d_update()
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| A D | corec37d.c | 69 PUSH_MTHD(push, NVC37D, UPDATE, 0x00000001 | in corec37d_update()
70 NVDEF(NVC37D, UPDATE, SPECIAL_HANDLING, NONE) | in corec37d_update()
71 NVDEF(NVC37D, UPDATE, INHIBIT_INTERRUPTS, FALSE)); in corec37d_update()
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| A D | wimmc37b.c | 40 PUSH_MTHD(push, NVC37B, UPDATE, 0x00000001 | in wimmc37b_update()
41 NVVAL(NVC37B, UPDATE, INTERLOCK_WITH_WINDOW, in wimmc37b_update()
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| A D | curs507a.c | 52 NVIF_WR32(user, NV507A, UPDATE, in curs507a_update()
53 NVDEF(NV507A, UPDATE, INTERLOCK_WITH_CORE, DISABLE)); in curs507a_update()
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| A D | cursc37a.c | 33 NVIF_WR32(user, NVC37A, UPDATE, 0x00000001); in cursc37a_update()
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| A D | wndwc37e.c | 282 PUSH_MTHD(push, NVC37E, UPDATE, 0x00000001 | in wndwc37e_update()
283 NVVAL(NVC37E, UPDATE, INTERLOCK_WITH_WIN_IMM, in wndwc37e_update()
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| A D | base507c.c | 44 PUSH_MTHD(push, NV507C, UPDATE, interlock[NV50_DISP_INTERLOCK_CORE]); in base507c_update()
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| /drivers/crypto/intel/qat/qat_common/ |
| A D | adf_sysfs_rl.c | 19 UPDATE, enumerator
43 [UPDATE] = "update",
390 case UPDATE: in sla_op_store()
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| /drivers/firmware/microchip/ |
| A D | Kconfig | 4 tristate "Microchip PolarFire SoC AUTO UPDATE"
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| /drivers/gpu/drm/i915/gem/ |
| A D | i915_gem_execbuffer.c | 68 #define UPDATE PIN_OFFSET_FIXED macro
676 entry->offset = i915_vma_offset(vma) | UPDATE; in eb_reserve_vma()
1033 entry->offset = i915_vma_offset(vma) | UPDATE; in eb_validate_vmas()
1418 return target->node.start | UPDATE; in relocate_entry()
1596 offset = gen8_canonical_addr(offset & ~UPDATE); in eb_relocate_vma()
3627 if (!(exec2_list[i].offset & UPDATE)) in i915_gem_execbuffer2_ioctl()
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| /drivers/net/wireless/ath/ath9k/ |
| A D | htc.h | 412 UPDATE, /* update pending */ enumerator
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| A D | beacon.c | 486 if (sc->beacon.updateslot == UPDATE) { in ath9k_beacon_tasklet()
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| A D | ath9k.h | 700 UPDATE, /* update pending */ enumerator
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| A D | htc_drv_main.c | 1605 priv->beacon.updateslot = UPDATE; in ath9k_htc_bss_info_changed()
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| A D | main.c | 1920 sc->beacon.updateslot = UPDATE; in ath9k_bss_info_changed()
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| /drivers/crypto/caam/ |
| A D | caamalg_qi2.c | 3049 UPDATE = 0, enumerator
3148 flc = &ctx->flc[UPDATE]; in ahash_set_sh_desc()
3153 dma_sync_single_for_device(ctx->dev, ctx->flc_dma[UPDATE], in ahash_set_sh_desc()
3621 req_ctx->flc = &ctx->flc[UPDATE]; in ahash_update_ctx()
3622 req_ctx->flc_dma = ctx->flc_dma[UPDATE]; in ahash_update_ctx()
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