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Searched refs:UPLL_BYPASS_EN_MASK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
A Drv770.c91 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK); in rv770_set_uvd_clocks()
122 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in rv770_set_uvd_clocks()
A Drv770d.h45 # define UPLL_BYPASS_EN_MASK 0x00000004 macro
A Dsid.h130 # define UPLL_BYPASS_EN_MASK 0x00000004 macro
A Devergreen.c1201 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK); in evergreen_set_uvd_clocks()
1262 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in evergreen_set_uvd_clocks()
A Dsi.c6986 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK); in si_set_uvd_clocks()
7048 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in si_set_uvd_clocks()
A Devergreend.h351 # define UPLL_BYPASS_EN_MASK 0x00000004 macro
A Dr600d.h1559 # define UPLL_BYPASS_EN_MASK 0x00000004 macro
A Dr600.c214 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~( in r600_set_uvd_clocks()
277 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in r600_set_uvd_clocks()
/drivers/gpu/drm/amd/amdgpu/
A Dsid.h52 # define UPLL_BYPASS_EN_MASK 0x00000004 macro
A Dsi.c1801 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK); in si_set_uvd_clocks()
1865 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_BYPASS_EN_MASK); in si_set_uvd_clocks()

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