Searched refs:VGA_RENDER_CONTROL (Results 1 – 8 of 8) sorted by relevance
| /drivers/gpu/drm/radeon/ |
| A D | avivod.h | 59 #define VGA_RENDER_CONTROL 0x0300 macro
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| A D | evergreen.c | 2670 save->vga_render_control = RREG32(VGA_RENDER_CONTROL); in evergreen_mc_stop()
2674 WREG32(VGA_RENDER_CONTROL, 0); in evergreen_mc_stop()
2845 WREG32(VGA_RENDER_CONTROL, save->vga_render_control); in evergreen_mc_resume()
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| /drivers/gpu/drm/amd/amdgpu/ |
| A D | gmc_v7_0.c | 289 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in gmc_v7_0_mc_program()
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| A D | gmc_v8_0.c | 464 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in gmc_v8_0_mc_program()
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| A D | dce_v8_0.c | 410 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1); in dce_v8_0_set_vga_render_state()
412 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in dce_v8_0_set_vga_render_state()
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| A D | gmc_v9_0.c | 2189 WREG32_FIELD15(DCE, 0, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in gmc_v9_0_hw_init()
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| A D | dce_v10_0.c | 459 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1); in dce_v10_0_set_vga_render_state()
461 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in dce_v10_0_set_vga_render_state()
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| A D | dce_v11_0.c | 481 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 1); in dce_v11_0_set_vga_render_state()
483 tmp = REG_SET_FIELD(tmp, VGA_RENDER_CONTROL, VGA_VSTATUS_CNTL, 0); in dce_v11_0_set_vga_render_state()
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Completed in 38 milliseconds