Searched refs:VID (Results 1 – 11 of 11) sorted by relevance
| /drivers/net/ethernet/mellanox/mlxsw/ |
| A D | spectrum_acl_flex_keys.c | 14 MLXSW_AFK_ELEMENT_INST_U32(VID, 0x08, 0, 12),
22 MLXSW_AFK_ELEMENT_INST_U32(VID, 0x08, 0, 12),
55 MLXSW_AFK_ELEMENT_INST_U32(VID, 0x00, 0, 12),
144 MLXSW_AFK_ELEMENT_INST_U32(VID, 0x04, 16, 12),
150 MLXSW_AFK_ELEMENT_INST_U32(VID, 0x04, 16, 12),
155 MLXSW_AFK_ELEMENT_INST_U32(VID, 0x04, 16, 12),
323 MLXSW_AFK_ELEMENT_INST_U32(VID, 0x04, 18, 12),
|
| A D | core_acl_flex_keys.c | 28 MLXSW_AFK_ELEMENT_INFO_U32(VID, 0x10, 8, 12),
|
| /drivers/gpu/drm/sti/ |
| A D | NOTES | 11 - The video plug (VID) connects to the HQVDP output.
28 Vid >--+ HQVDP +--+VID Aux +---+ | :===========:
42 buffers) and to HQVDP+VID (video buffers)
56 +-> | HQVDP | |VID Aux |<+ | | | :===========: |
|
| /drivers/cpufreq/ |
| A D | powernow-k7.h | 12 VID:5, // 12:8 member
|
| A D | powernow-k7.c | 238 if (fidvidctl.bits.VID != vid) { in change_VID()
240 fidvidctl.bits.VID = vid; in change_VID()
|
| /drivers/gpu/drm/radeon/ |
| A D | trinityd.h | 41 # define VID(x) ((x) << 16) macro
|
| A D | trinity_dpm.c | 597 value |= VID(vid_7bit); in trinity_set_vid()
|
| /drivers/scsi/megaraid/ |
| A D | Kconfig.megaraid | 24 OEM Product Name VID :DID :SVID:SSID
|
| /drivers/usb/misc/ |
| A D | Kconfig | 231 VID/PID pairs. This driver then initiates a corresponding test mode on
|
| /drivers/hwmon/ |
| A D | Kconfig | 447 tristate "Attansic ATXP1 VID controller"
451 If you say yes here you get support for the Attansic ATXP1 VID
|
| /drivers/regulator/ |
| A D | Kconfig | 1500 with Serial VID control and DVFS.
|
Completed in 30 milliseconds