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Searched refs:VLV_WM_LEVEL_DDR_DVFS (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/display/
A Di9xx_wm.c1495 display->wm.pri_latency[VLV_WM_LEVEL_DDR_DVFS] = 33; in vlv_setup_wm_latency()
1497 display->wm.num_levels = VLV_WM_LEVEL_DDR_DVFS + 1; in vlv_setup_wm_latency()
1708 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); in vlv_raw_plane_wm_compute()
2072 if (is_disabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_DDR_DVFS)) in vlv_program_watermarks()
2089 if (is_enabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_DDR_DVFS)) in vlv_program_watermarks()
3940 wm->level = VLV_WM_LEVEL_DDR_DVFS; in vlv_wm_get_hw_state()
A Dintel_display_types.h819 VLV_WM_LEVEL_DDR_DVFS, enumerator

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