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Searched refs:VLV_WM_LEVEL_PM5 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/display/
A Di9xx_wm.c1494 display->wm.pri_latency[VLV_WM_LEVEL_PM5] = 12; in vlv_setup_wm_latency()
1707 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], in vlv_raw_plane_wm_compute()
2075 if (is_disabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_PM5)) in vlv_program_watermarks()
2086 if (is_enabling(old_wm->level, new_wm.level, VLV_WM_LEVEL_PM5)) in vlv_program_watermarks()
3916 wm->level = VLV_WM_LEVEL_PM5; in vlv_wm_get_hw_state()
3936 display->wm.num_levels = VLV_WM_LEVEL_PM5 + 1; in vlv_wm_get_hw_state()
A Dintel_display_types.h818 VLV_WM_LEVEL_PM5, enumerator

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