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Searched refs:Voltage (Results 1 – 25 of 60) sorted by relevance

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/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
A Dsmu13_driver_if_v13_0_5.h80 uint32_t Voltage; member
96 uint16_t Voltage[2]; //[mV] indices: VDDCR_VDD, VDDCR_SOC member
A Dsmu13_driver_if_yellow_carp.h114 uint32_t Voltage; member
169 uint16_t Voltage[2]; //[mV] indices: VDDCR_VDD, VDDCR_SOC member
A Dsmu11_driver_if_vangogh.h178 uint16_t Voltage[3]; //[mV] indices: VDDCR_VDD, VDDCR_SOC, VDDCR_GFX member
208 uint16_t Voltage[3]; //[mV] indices: VDDCR_VDD, VDDCR_SOC, VDDCR_GFX member
A Dsmu13_driver_if_v13_0_4.h115 uint32_t Voltage; member
169 uint16_t Voltage[2]; //[mV] indices: VDDCR_VDD, VDDCR_SOC member
A Dsmu11_driver_if_cyan_skillfish.h59 uint32_t Voltage[2]; //[mV] indices: VDDCR_VDD, VDDCR_GFX member
A Dsmu12_driver_if.h182 uint16_t Voltage[2]; //[mV] indices: VDDCR_VDD, VDDCR_SOC member
A Dsmu14_driver_if_v14_0_0.h114 uint32_t Voltage; member
/drivers/soc/mediatek/
A DKconfig33 Say yes here to add support for the MediaTek Dynamic Voltage
73 tristate "MediaTek Smart Voltage Scaling(SVS)"
76 The Smart Voltage Scaling(SVS) engine is a piece of hardware
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
A Ddcn31_smu.h123 uint32_t Voltage; member
178 uint16_t Voltage[2]; //[mV] indices: VDDCR_VDD, VDDCR_SOC member
A Ddcn31_clk_mgr.c598 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage; in dcn31_clk_mgr_helper_populate_bw_params()
609 …= find_clk_for_voltage(clock_table, clock_table->DcfClocks, clock_table->DfPstateTable[j].Voltage); in dcn31_clk_mgr_helper_populate_bw_params()
610 …= find_clk_for_voltage(clock_table, clock_table->SocClocks, clock_table->DfPstateTable[j].Voltage); in dcn31_clk_mgr_helper_populate_bw_params()
787 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].Voltage); in dcn31_clk_mgr_construct()
/drivers/interconnect/mediatek/
A DKconfig15 Voltage Frequency Scaling Resource Collector (DVFSRC) MCU
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
A Ddcn314_smu.h42 uint32_t Voltage; member
A Ddcn314_clk_mgr.c656 clock_table->DfPstateTable[j].Voltage <= clock_table->SocVoltage[i]) { in dcn314_clk_mgr_helper_populate_bw_params()
674 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[min_pstate].Voltage; in dcn314_clk_mgr_helper_populate_bw_params()
690 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[max_pstate].Voltage; in dcn314_clk_mgr_helper_populate_bw_params()
896 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].Voltage); in dcn314_clk_mgr_construct()
/drivers/soc/tegra/
A DKconfig160 bool "Voltage scaling support for Tegra20 SoCs"
165 bool "Voltage scaling support for Tegra30 SoCs"
/drivers/thermal/mediatek/
A DKconfig27 This driver configures LVTS (Low Voltage Thermal Sensor)
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
A Ddcn315_smu.h64 uint32_t Voltage; member
A Ddcn315_clk_mgr.c497 if (clock_table->DfPstateTable[j].Voltage <= clock_table->SocVoltage[i]) in dcn315_clk_mgr_helper_populate_bw_params()
527 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[0].Voltage; in dcn315_clk_mgr_helper_populate_bw_params()
714 i, smu_dpm_clks.dpm_clks->DfPstateTable[i].Voltage); in dcn315_clk_mgr_construct()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
A Ddcn316_smu.h70 uint32_t Voltage; member
A Ddcn316_clk_mgr.c527 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].Voltage; in dcn316_clk_mgr_helper_populate_bw_params()
538 …= find_clk_for_voltage(clock_table, clock_table->DcfClocks, clock_table->DfPstateTable[j].Voltage); in dcn316_clk_mgr_helper_populate_bw_params()
541 …= find_clk_for_voltage(clock_table, clock_table->SocClocks, clock_table->DfPstateTable[j].Voltage); in dcn316_clk_mgr_helper_populate_bw_params()
/drivers/memory/samsung/
A DKconfig18 Controller). The driver provides support for Dynamic Voltage and
/drivers/acpi/dptf/
A DKconfig38 switch the PCH FIVR (Fully Integrated Voltage Regulator) frequency.
/drivers/gpu/drm/amd/pm/swsmu/smu11/
A Dcyan_skillfish_ppt.c174 *value = metrics->Current.Voltage[0]; in cyan_skillfish_get_smu_metrics_data()
177 *value = metrics->Current.Voltage[1]; in cyan_skillfish_get_smu_metrics_data()
A Dvangogh_ppt.c324 *value = metrics->Voltage[2]; in vangogh_get_legacy_smu_metrics_data()
327 *value = metrics->Voltage[1]; in vangogh_get_legacy_smu_metrics_data()
397 *value = metrics->Current.Voltage[2]; in vangogh_get_smu_metrics_data()
400 *value = metrics->Current.Voltage[1]; in vangogh_get_smu_metrics_data()
1872 gpu_metrics->average_cpu_voltage = metrics.Average.Voltage[0]; in vangogh_get_gpu_metrics_v2_4()
1873 gpu_metrics->average_soc_voltage = metrics.Average.Voltage[1]; in vangogh_get_gpu_metrics_v2_4()
1874 gpu_metrics->average_gfx_voltage = metrics.Average.Voltage[2]; in vangogh_get_gpu_metrics_v2_4()
/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
A Ddcn35_smu.h96 uint32_t Voltage; member
A Ddcn35_clk_mgr.c976 bw_params->clk_table.entries[i].voltage = clock_table->MemPstateTable[min_pstate].Voltage; in dcn35_clk_mgr_helper_populate_bw_params()
995 bw_params->clk_table.entries[i].voltage = clock_table->MemPstateTable[max_pstate].Voltage; in dcn35_clk_mgr_helper_populate_bw_params()
1227 smu_dpm_clks_b->dpm_clks->MemPstateTable[i].Voltage = in translate_to_DpmClocks_t_dcn35()
1228 smu_dpm_clks_a->dpm_clks->MemPstateTable[i].Voltage; in translate_to_DpmClocks_t_dcn35()
1390 i, smu_dpm_clks.dpm_clks->MemPstateTable[i].Voltage); in dcn35_clk_mgr_construct()

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