Searched refs:WB_0 (Results 1 – 6 of 6) sorted by relevance
| /drivers/gpu/drm/msm/disp/dpu1/ |
| A D | dpu_encoder_phys_wb.c | 68 ot_params.num = hw_wb->idx - WB_0; in dpu_encoder_phys_wb_set_ot_limit()
113 qos_params.num = hw_wb->idx - WB_0; in dpu_encoder_phys_wb_set_qos_remap()
293 DPU_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0); in _dpu_encoder_phys_wb_update_flush()
316 hw_wb->idx - WB_0); in _dpu_encoder_phys_wb_update_flush()
334 hw_wb->idx - WB_0, mode.name, in dpu_encoder_phys_wb_setup()
365 DPU_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0); in dpu_encoder_phys_wb_done_irq()
480 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_prepare_for_kickoff()
504 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_needs_single_flush()
515 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_handle_post_kickoff()
525 DPU_DEBUG("[wb:%d]\n", phys_enc->hw_wb->idx - WB_0); in dpu_encoder_phys_wb_enable()
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| A D | dpu_rm.h | 34 struct dpu_hw_wb *hw_wb[WB_MAX - WB_0];
115 return rm->hw_wb[wb_idx - WB_0]; in dpu_rm_get_wb()
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| A D | dpu_hw_ctl.c | 306 case WB_0: in dpu_hw_ctl_update_pending_flush_wb()
326 ctx->pending_wb_flush_mask |= BIT(wb - WB_0); in dpu_hw_ctl_update_pending_flush_wb_v1()
598 wb_active |= BIT(cfg->wb - WB_0); in dpu_hw_ctl_intf_cfg_v1()
717 wb_active &= ~BIT(cfg->wb - WB_0); in dpu_hw_ctl_reset_intf_cfg_v1()
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| A D | dpu_hw_mdss.h | 254 WB_0 = 1, enumerator
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| A D | dpu_encoder.c | 441 phys_enc->hw_wb ? phys_enc->hw_wb->idx - WB_0 : -1, in dpu_encoder_helper_report_irq_timeout()
2362 phys_enc->hw_wb->idx - WB_0); in dpu_encoder_helper_phys_setup_cwb()
2501 phys->hw_wb ? phys->hw_wb->idx - WB_0 : -1, in _dpu_encoder_status_show()
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| A D | dpu_rm.c | 125 rm->hw_wb[wb->id - WB_0] = hw; in dpu_rm_init()
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