Searched refs:WB_ENABLE (Results 1 – 12 of 12) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_dwb.c | 76 REG_UPDATE(WB_ENABLE, WB_ENABLE, 1); in dwb1_enable()
89 REG_UPDATE(WB_ENABLE, WB_ENABLE, 0); in dwb1_disable()
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| A D | dcn10_dwb.h | 52 SRI(WB_ENABLE, CNV, inst),\
85 SF(CNV0_WB_ENABLE, WB_ENABLE, mask_sh),\
149 type WB_ENABLE;\
215 uint32_t WB_ENABLE; member
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| /drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_dwb.c | 118 REG_UPDATE(WB_ENABLE, WB_ENABLE, 1); in dwb2_enable()
144 REG_UPDATE(WB_ENABLE, WB_ENABLE, 0); in dwb2_disable()
204 REG_GET(WB_ENABLE, WB_ENABLE, &wb_enabled); in dwb2_is_enabled()
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| A D | dcn20_dwb.h | 31 SRI2_DWB(WB_ENABLE, CNV, inst),\
79 SF_DWB(WB_ENABLE, WB_ENABLE, mask_sh),\
203 type WB_ENABLE;\
331 uint32_t WB_ENABLE; member
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| /drivers/media/platform/microchip/ |
| A D | microchip-isc-base.c | 789 WB_ENABLE | GAM_ENABLES | DPC_BLCENABLE | in isc_try_configure_pipeline()
799 CSC_ENABLE | GAM_ENABLES | WB_ENABLE | in isc_try_configure_pipeline()
810 CSC_ENABLE | WB_ENABLE | GAM_ENABLES | in isc_try_configure_pipeline()
822 CSC_ENABLE | WB_ENABLE | GAM_ENABLES | in isc_try_configure_pipeline()
833 CSC_ENABLE | WB_ENABLE | GAM_ENABLES | in isc_try_configure_pipeline()
841 isc->try_config.bits_pipeline = WB_ENABLE | DPC_BLCENABLE; in isc_try_configure_pipeline()
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| A D | microchip-isc.h | 82 #define WB_ENABLE BIT(3) macro
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| A D | microchip-sama5d2-isc.c | 56 (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \
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| A D | microchip-sama7g5-isc.c | 59 (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \
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| /drivers/staging/media/deprecated/atmel/ |
| A D | atmel-isc-base.c | 755 WB_ENABLE | GAM_ENABLES | DPC_BLCENABLE | in isc_try_configure_pipeline()
765 CSC_ENABLE | GAM_ENABLES | WB_ENABLE | in isc_try_configure_pipeline()
776 CSC_ENABLE | WB_ENABLE | GAM_ENABLES | in isc_try_configure_pipeline()
788 CSC_ENABLE | WB_ENABLE | GAM_ENABLES | in isc_try_configure_pipeline()
799 CSC_ENABLE | WB_ENABLE | GAM_ENABLES | in isc_try_configure_pipeline()
807 isc->try_config.bits_pipeline = WB_ENABLE | DPC_BLCENABLE; in isc_try_configure_pipeline()
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| A D | atmel-isc.h | 81 #define WB_ENABLE BIT(3) macro
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| A D | atmel-sama5d2-isc.c | 56 (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \
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| A D | atmel-sama7g5-isc.c | 59 (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \
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