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Searched refs:WM_1A (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
A Ddcn401_clk_mgr.c202 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].valid = true; in dcn401_build_wm_range_table()
203 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE; in dcn401_build_wm_range_table()
204 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz; in dcn401_build_wm_range_table()
205 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn401_build_wm_range_table()
206 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn401_build_wm_range_table()
207 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].pmfw_breakdown.max_uclk = 0xFFFF; in dcn401_build_wm_range_table()
209 clk_mgr->bw_params->wm_table.nv_entries[WM_1A].valid = false; in dcn401_build_wm_range_table()
/drivers/gpu/drm/amd/display/dc/inc/hw/
A Dclk_mgr.h39 #define WM_1A 2 macro

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