Searched refs:WM_B (Results 1 – 12 of 12) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| A D | dcn301_fpu.c | 229 .wm_inst = WM_B,
266 .wm_inst = WM_B,
442 table_entry = &bw_params->wm_table.entries[WM_B]; in dcn301_fpu_calculate_wm_and_dlg()
|
| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | dcn30_fpu.c | 361 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid) { in dcn30_fpu_calculate_wm_and_dlg()
366 …ram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_l… in dcn30_fpu_calculate_wm_and_dlg()
367 ….sr_enter_plus_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_input.sr_enter… in dcn30_fpu_calculate_wm_and_dlg()
368 …context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_B].dml_in… in dcn30_fpu_calculate_wm_and_dlg()
|
| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | dcn32_fpu.c | 203 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_dcfclk = dcfclk_mhz_for_the_… in dcn32_build_wm_range_table_fpu()
223 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].valid = true; in dcn32_build_wm_range_table_fpu()
224 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.pstate_latency_us = pstate_latency_us; in dcn32_build_wm_range_table_fpu()
225 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.fclk_change_latency_us = fclk_change_… in dcn32_build_wm_range_table_fpu()
226 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn32_build_wm_range_table_fpu()
227 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].dml_input.sr_enter_plus_exit_time_us = sr_enter… in dcn32_build_wm_range_table_fpu()
228 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.wm_type = WATERMARKS_CLOCK_RANGE; in dcn32_build_wm_range_table_fpu()
229 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()
230 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.min_uclk = setb_min_uclk_mhz; in dcn32_build_wm_range_table_fpu()
231 clk_mgr->base.bw_params->wm_table.nv_entries[WM_B].pmfw_breakdown.max_uclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()
[all …]
|
| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | clk_mgr.h | 35 #define WM_B 1 macro
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| A D | dcn316_clk_mgr.c | 281 .wm_inst = WM_B,
318 .wm_inst = WM_B,
|
| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | dcn20_fpu.c | 779 .wm_inst = WM_B,
816 .wm_inst = WM_B,
853 .wm_inst = WM_B,
890 .wm_inst = WM_B,
927 .wm_inst = WM_B,
964 .wm_inst = WM_B,
2308 table_entry = &bw_params->wm_table.entries[WM_B]; in dcn21_calculate_wm()
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| A D | dcn315_clk_mgr.c | 316 .wm_inst = WM_B,
353 .wm_inst = WM_B,
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 355 .wm_inst = WM_B,
392 .wm_inst = WM_B,
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_clk_mgr.c | 414 .wm_inst = WM_B,
451 .wm_inst = WM_B,
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| A D | dcn35_clk_mgr.c | 657 .wm_inst = WM_B,
694 .wm_inst = WM_B,
|
| /drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| A D | dcn_calcs.c | 44 #define WM_B 1 macro
1417 ranges.reader_wm_sets[1].wm_inst = WM_B; in dcn_bw_notify_pplib_of_wm_ranges()
|
| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| A D | dcn401_clk_mgr.c | 197 clk_mgr->bw_params->wm_table.nv_entries[WM_B].valid = false; in dcn401_build_wm_range_table()
|
Completed in 41 milliseconds