Searched refs:WM_C (Results 1 – 11 of 11) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | dcn30_fpu.c | 408 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) { in dcn30_fpu_calculate_wm_and_dlg()
437 …context->bw_ctx.dml.soc.sr_exit_time_us = dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].dml_in… in dcn30_fpu_calculate_wm_and_dlg()
691 base->bw_params->wm_table.nv_entries[WM_C].valid = true; in dcn3_fpu_build_wm_range_table()
692 base->bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 0; in dcn3_fpu_build_wm_range_table()
693 base->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn3_fpu_build_wm_range_table()
694 …base->bw_params->wm_table.nv_entries[WM_C].dml_input.sr_enter_plus_exit_time_us = sr_enter_plus_ex… in dcn3_fpu_build_wm_range_table()
695 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTATE; in dcn3_fpu_build_wm_range_table()
696 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_dcfclk = 0; in dcn3_fpu_build_wm_range_table()
697 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn3_fpu_build_wm_range_table()
698 base->bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn3_fpu_build_wm_range_table()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| A D | dcn301_fpu.c | 237 .wm_inst = WM_C,
274 .wm_inst = WM_C,
437 table_entry = &bw_params->wm_table.entries[WM_C]; in dcn301_fpu_calculate_wm_and_dlg()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | dcn32_fpu.c | 236 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].valid = true; in dcn32_build_wm_range_table_fpu()
237 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.pstate_latency_us = 50; in dcn32_build_wm_range_table_fpu()
238 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.fclk_change_latency_us = fclk_change_… in dcn32_build_wm_range_table_fpu()
239 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].dml_input.sr_exit_time_us = sr_exit_time_us; in dcn32_build_wm_range_table_fpu()
241 …clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.wm_type = WATERMARKS_DUMMY_PSTAT… in dcn32_build_wm_range_table_fpu()
242 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_dcfclk = min_dcfclk_mhz; in dcn32_build_wm_range_table_fpu()
243 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.max_dcfclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()
244 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_uclk = min_uclk_mhz; in dcn32_build_wm_range_table_fpu()
245 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.max_uclk = 0xFFFF; in dcn32_build_wm_range_table_fpu()
2508 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) { in dcn32_calculate_wm_and_dlg_fpu()
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| /drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | clk_mgr.h | 36 #define WM_C 2 macro
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| A D | dcn316_clk_mgr.c | 289 .wm_inst = WM_C,
326 .wm_inst = WM_C,
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| /drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| A D | dcn20_fpu.c | 787 .wm_inst = WM_C,
824 .wm_inst = WM_C,
861 .wm_inst = WM_C,
898 .wm_inst = WM_C,
935 .wm_inst = WM_C,
972 .wm_inst = WM_C,
2303 table_entry = &bw_params->wm_table.entries[WM_C]; in dcn21_calculate_wm()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| A D | dcn315_clk_mgr.c | 324 .wm_inst = WM_C,
361 .wm_inst = WM_C,
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 363 .wm_inst = WM_C,
400 .wm_inst = WM_C,
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_clk_mgr.c | 422 .wm_inst = WM_C,
459 .wm_inst = WM_C,
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| A D | dcn35_clk_mgr.c | 665 .wm_inst = WM_C,
702 .wm_inst = WM_C,
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| /drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| A D | dcn_calcs.c | 45 #define WM_C 2 macro
1420 ranges.reader_wm_sets[2].wm_inst = WM_C; in dcn_bw_notify_pplib_of_wm_ranges()
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