Searched refs:WritebackHTaps (Results 1 – 15 of 15) sorted by relevance
| /drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| A D | display_mode_vba_31.h | 36 unsigned int WritebackHTaps,
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| A D | display_mode_vba_31.c | 2031 v->WritebackHTaps[k],
3361 unsigned int WritebackHTaps, argument
3370 DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) / WritebackHRatio;
3917 || v->WritebackHTaps[k] > v->WritebackMaxHSCLTaps
3919 || v->WritebackHRatio[k] > v->WritebackHTaps[k] || v->WritebackVRatio[k] > v->WritebackVTaps[k]
3920 || (v->WritebackHTaps[k] > 2.0 && ((v->WritebackHTaps[k] % 2) == 1))) {
3940 v->WritebackHTaps[k],
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| /drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| A D | display_mode_vba_314.h | 37 unsigned int WritebackHTaps,
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| A D | display_mode_vba_314.c | 2049 v->WritebackHTaps[k],
3467 unsigned int WritebackHTaps, argument
3476 DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) / WritebackHRatio;
4008 || v->WritebackHTaps[k] > v->WritebackMaxHSCLTaps
4010 || v->WritebackHRatio[k] > v->WritebackHTaps[k] || v->WritebackVRatio[k] > v->WritebackVTaps[k]
4011 || (v->WritebackHTaps[k] > 2.0 && ((v->WritebackHTaps[k] % 2) == 1))) {
4031 v->WritebackHTaps[k],
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| /drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| A D | display_mode_vba_30.h | 36 unsigned int WritebackHTaps,
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| A D | display_mode_vba_30.c | 1880 v->WritebackHTaps[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3226 unsigned int WritebackHTaps, in dml30_CalculateWriteBackDISPCLK() argument
3235 DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) / WritebackHRatio; in dml30_CalculateWriteBackDISPCLK()
3710 || v->WritebackHTaps[k] in dml30_ModeSupportAndSystemConfigurationFull()
3715 > v->WritebackHTaps[k] in dml30_ModeSupportAndSystemConfigurationFull()
3718 || (v->WritebackHTaps[k] > 2.0 in dml30_ModeSupportAndSystemConfigurationFull()
3719 && ((v->WritebackHTaps[k] % 2) in dml30_ModeSupportAndSystemConfigurationFull()
3739 v->WritebackHTaps[k], in dml30_ModeSupportAndSystemConfigurationFull()
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| /drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| A D | display_mode_vba_util_32.h | 840 unsigned int WritebackHTaps,
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| A D | display_mode_vba_32.c | 92 mode_lib->vba.WritebackHTaps[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1886 || mode_lib->vba.WritebackHTaps[k] > mode_lib->vba.WritebackMaxHSCLTaps in dml32_ModeSupportAndSystemConfigurationFull()
1888 || mode_lib->vba.WritebackHRatio[k] > mode_lib->vba.WritebackHTaps[k] in dml32_ModeSupportAndSystemConfigurationFull()
1890 || (mode_lib->vba.WritebackHTaps[k] > 2.0 in dml32_ModeSupportAndSystemConfigurationFull()
1891 && ((mode_lib->vba.WritebackHTaps[k] % 2) == 1))) { in dml32_ModeSupportAndSystemConfigurationFull()
2237 mode_lib->vba.WritebackHTaps[k], in dml32_ModeSupportAndSystemConfigurationFull()
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| A D | display_mode_vba_util_32.c | 4650 unsigned int WritebackHTaps, in dml32_CalculateWriteBackDISPCLK() argument
4660 DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) / WritebackHRatio; in dml32_CalculateWriteBackDISPCLK()
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| /drivers/gpu/drm/amd/display/dc/dml/ |
| A D | display_mode_vba.h | 1070 unsigned int WritebackHTaps[DC__NUM_DPP__MAX]; member
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| A D | display_mode_vba.c | 675 mode_lib->vba.WritebackHTaps[mode_lib->vba.NumberOfActivePlanes] = in fetch_pipe_params()
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| /drivers/gpu/drm/amd/display/dc/dml2/ |
| A D | display_mode_core.c | 62 dml_uint_t WritebackHTaps,
1807 dml_uint_t WritebackHTaps, in CalculateWriteBackDISPCLK() argument
1817 DISPCLK_H = PixelClock * dml_ceil(WritebackHTaps / 8.0, 1) / WritebackHRatio; in CalculateWriteBackDISPCLK()
6875 …|| mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k] > (dml_uint_t) mode_lib->ms.ip.write… in dml_core_mode_support()
6877 …teback.WritebackHRatio[k] > (dml_uint_t) mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k] in dml_core_mode_support()
6879 …b->ms.cache_display_cfg.writeback.WritebackHTaps[k] > 2.0 && ((mode_lib->ms.cache_display_cfg.writ… in dml_core_mode_support()
7210 mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k], in dml_core_mode_support()
8350 mode_lib->ms.cache_display_cfg.writeback.WritebackHTaps[k], in dml_core_mode_programming()
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| A D | display_mode_core_structs.h | 647 dml_uint_t WritebackHTaps[__DML_NUM_PLANES__]; member
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| A D | dml2_translation_helper.c | 1247 out->WritebackHTaps[location] = wb_info->dwb_params.scaler_taps.h_taps > 0 ? in populate_dml_writeback_cfg_from_stream_state()
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| /drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/ |
| A D | dml2_core_dcn4_calcs.c | 4437 unsigned int WritebackHTaps, in CalculateWriteBackDISPCLK() argument
4446 DISPCLK_H = PixelClock * math_ceil2((double)WritebackHTaps / 8.0, 1) / WritebackHRatio; in CalculateWriteBackDISPCLK()
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