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Searched refs:XLGMAC_DMA_REG (Results 1 – 3 of 3) sorted by relevance

/drivers/net/ethernet/synopsys/
A Ddwc-xlgmac-hw.c509 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_enable_tx()
512 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_enable_tx()
566 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_disable_tx()
569 writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); in xlgmac_disable_tx()
613 regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_RCR)); in xlgmac_enable_rx()
690 XLGMAC_DMA_REG(channel, DMA_CH_TDTR_LO)); in xlgmac_tx_start_xmit()
1077 XLGMAC_DMA_REG(channel, DMA_CH_TDLR_HI)); in xlgmac_tx_desc_init()
1079 XLGMAC_DMA_REG(channel, DMA_CH_TDLR_LO)); in xlgmac_tx_desc_init()
1161 XLGMAC_DMA_REG(channel, DMA_CH_RDLR_HI)); in xlgmac_rx_desc_init()
1163 XLGMAC_DMA_REG(channel, DMA_CH_RDLR_LO)); in xlgmac_rx_desc_init()
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A Ddwc-xlgmac-net.c277 dma_ch_isr = readl(XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_isr()
324 writel(dma_ch_isr, XLGMAC_DMA_REG(channel, DMA_CH_SR)); in xlgmac_isr()
984 XLGMAC_DMA_REG(channel, DMA_CH_RDTR_LO)); in xlgmac_rx_refresh()
A Ddwc-xlgmac-reg.h742 #define XLGMAC_DMA_REG(channel, reg) ((channel)->dma_regs + (reg)) macro

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