Home
last modified time | relevance | path

Searched refs:ZL_REG_OUTPUT_ESYNC_WIDTH (Results 1 – 2 of 2) sorted by relevance

/drivers/dpll/zl3073x/
A Dregs.h260 #define ZL_REG_OUTPUT_ESYNC_WIDTH ZL_REG(14, 0x18, 4) macro
A Ddpll.c1029 rc = zl3073x_read_u32(zldev, ZL_REG_OUTPUT_ESYNC_WIDTH, &esync_width); in zl3073x_dpll_output_pin_esync_get()
1147 rc = zl3073x_write_u32(zldev, ZL_REG_OUTPUT_ESYNC_WIDTH, esync_width); in zl3073x_dpll_output_pin_esync_set()
1371 rc = zl3073x_write_u32(zldev, ZL_REG_OUTPUT_ESYNC_WIDTH, ndiv); in zl3073x_dpll_output_pin_frequency_set()

Completed in 12 milliseconds