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Searched refs:ZL_REG_OUTPUT_MB_MASK (Results 1 – 3 of 3) sorted by relevance

/drivers/dpll/zl3073x/
A Ddpll.c980 ZL_REG_OUTPUT_MB_MASK, BIT(out)); in zl3073x_dpll_output_pin_esync_get()
1091 ZL_REG_OUTPUT_MB_MASK, BIT(out)); in zl3073x_dpll_output_pin_esync_set()
1154 ZL_REG_OUTPUT_MB_MASK, BIT(out)); in zl3073x_dpll_output_pin_esync_set()
1180 ZL_REG_OUTPUT_MB_MASK, BIT(out)); in zl3073x_dpll_output_pin_frequency_get()
1275 ZL_REG_OUTPUT_MB_MASK, BIT(out)); in zl3073x_dpll_output_pin_frequency_set()
1297 ZL_REG_OUTPUT_MB_MASK, BIT(out)); in zl3073x_dpll_output_pin_frequency_set()
1377 ZL_REG_OUTPUT_MB_MASK, BIT(out)); in zl3073x_dpll_output_pin_frequency_set()
1411 ZL_REG_OUTPUT_MB_MASK, BIT(out)); in zl3073x_dpll_output_pin_phase_adjust_get()
1474 ZL_REG_OUTPUT_MB_MASK, BIT(out)); in zl3073x_dpll_output_pin_phase_adjust_set()
1485 ZL_REG_OUTPUT_MB_MASK, BIT(out)); in zl3073x_dpll_output_pin_phase_adjust_set()
A Dregs.h235 #define ZL_REG_OUTPUT_MB_MASK ZL_REG(14, 0x02, 2) macro
A Dcore.c535 ZL_REG_OUTPUT_MB_MASK, BIT(index)); in zl3073x_out_state_fetch()

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