Searched refs:_MASKED_BIT_DISABLE (Results 1 – 24 of 24) sorted by relevance
| /drivers/gpu/drm/i915/gvt/ |
| A D | reg.h | 96 ((_val) & _MASKED_BIT_DISABLE(_b))
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| A D | handlers.c | 2136 else if (data & _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)) in ring_reset_ctl_write()
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| /drivers/gpu/drm/i915/ |
| A D | i915_reg_defs.h | 119 #define _MASKED_BIT_DISABLE(a) (_MASKED_FIELD((a), 0)) macro
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| A D | intel_clock_gating.c | 659 _MASKED_BIT_DISABLE(ECO_FLIP_DONE)); in gen3_init_clock_gating()
678 _MASKED_BIT_DISABLE(MI_AGPBUSY_830_MODE)); in i85x_init_clock_gating()
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| A D | i915_perf.c | 2951 _MASKED_BIT_DISABLE(STALL_DOP_GATING_DISABLE)); in gen12_disable_metric_set()
2953 _MASKED_BIT_DISABLE(GEN12_DISABLE_DOP_GATING)); in gen12_disable_metric_set()
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| A D | intel_uncore.c | 133 #define fw_clear(d, val) writel(_MASKED_BIT_DISABLE((val)), (d)->reg_set)
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| /drivers/gpu/drm/i915/gt/ |
| A D | intel_engine_pm.c | 27 _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE)); in intel_gsc_idle_msg_enable()
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| A D | intel_ring_submission.c | 276 RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in xcs_resume()
822 *cs++ = _MASKED_BIT_DISABLE( in mi_set_context()
1076 _MASKED_BIT_DISABLE(GEN6_PSMI_SLEEP_MSG_DISABLE)); in gen6_bsd_submit_request()
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| A D | intel_lrc.c | 848 ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT); in init_common_regs()
852 ctl |= _MASKED_BIT_DISABLE(CTX_CTRL_ENGINE_CTX_SAVE_INHIBIT | in init_common_regs()
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| A D | intel_rc6.c | 767 _MASKED_BIT_DISABLE(VLV_COUNT_RANGE_HIGH)); in vlv_residency_raw()
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| A D | intel_workarounds.c | 313 wa_add(wal, reg, 0, _MASKED_BIT_DISABLE(val), val, true); in wa_masked_dis()
319 wa_mcr_add(wal, reg, 0, _MASKED_BIT_DISABLE(val), val, true); in wa_mcr_masked_dis()
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| A D | intel_reset.c | 608 _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)); in gen8_engine_reset_cancel()
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| A D | intel_engine_cs.c | 1697 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in intel_engine_cancel_stop_cs()
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| A D | intel_execlists_submission.c | 2936 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in enable_execlists()
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| /drivers/gpu/drm/xe/ |
| A D | xe_eu_stall.c | 420 write_ptr_reg = _MASKED_BIT_DISABLE(XEHPC_EUSTALL_REPORT_OVERFLOW_DROP); in clear_dropped_eviction_line_bit()
810 _MASKED_BIT_DISABLE(DISABLE_DOP_GATING)); in xe_eu_stall_disable_locked()
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| A D | xe_pxp.c | 328 _MASKED_BIT_DISABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES); in kcr_pxp_set_status()
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| A D | xe_hw_engine.c | 345 _MASKED_BIT_DISABLE(STOP_RING)); in xe_hw_engine_enable_ring()
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| A D | xe_uc_fw.c | 887 xe_mmio_write32(mmio, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); in uc_fw_xfer()
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| A D | xe_oa.c | 827 _MASKED_BIT_DISABLE(STALL_DOP_GATING_DISABLE)); in xe_oa_disable_metric_set()
829 _MASKED_BIT_DISABLE(DISABLE_DOP_GATING)); in xe_oa_disable_metric_set()
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| /drivers/gpu/drm/i915/pxp/ |
| A D | intel_pxp.c | 68 _MASKED_BIT_DISABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES); in kcr_pxp_set_status()
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| /drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_uc_fw.c | 1126 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); in uc_fw_xfer()
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| A D | intel_guc_submission.c | 4421 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in start_engine()
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| /drivers/gpu/drm/i915/display/ |
| A D | i9xx_wm.c | 176 _MASKED_BIT_DISABLE(FW_BLC_SELF_EN); in _intel_set_memory_cxsr()
187 _MASKED_BIT_DISABLE(INSTPM_SELF_EN); in _intel_set_memory_cxsr()
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| A D | intel_display_irq.c | 1561 _MASKED_BIT_DISABLE(CSTATE_RENDER_CLOCK_GATE_DISABLE)); in i915gm_irq_cstate_wa_disable()
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