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/drivers/tty/serial/8250/
A DMakefile12 obj-$(CONFIG_SERIAL_8250) += 8250_base.o
13 8250_base-y := 8250_port.o
14 8250_base-$(CONFIG_SERIAL_8250_DMA) += 8250_dma.o
15 8250_base-$(CONFIG_SERIAL_8250_DWLIB) += 8250_dwlib.o
16 8250_base-$(CONFIG_SERIAL_8250_FINTEK) += 8250_fintek.o
17 8250_base-$(CONFIG_SERIAL_8250_PCILIB) += 8250_pcilib.o
A D8250_fourport.c12 #define SERIAL8250_FOURPORT(_base, _irq) \ argument
13 SERIAL8250_PORT_FLAGS(_base, _irq, UPF_FOURPORT)
A D8250.h110 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \ argument
112 .iobase = _base, \
119 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0) argument
/drivers/net/ethernet/mediatek/
A Dmtk_wed_debugfs.c31 #define DUMP_RING(_prefix, _base, ...) \ argument
32 { _prefix " BASE", _base, __VA_ARGS__ }, \
33 { _prefix " CNT", _base + 0x4, __VA_ARGS__ }, \
34 { _prefix " CIDX", _base + 0x8, __VA_ARGS__ }, \
35 { _prefix " DIDX", _base + 0xc, __VA_ARGS__ }
39 #define DUMP_WED_RING(_base) DUMP_RING(#_base, MTK_##_base, DUMP_TYPE_WED) argument
42 #define DUMP_WDMA_RING(_base) DUMP_RING(#_base, MTK_##_base, DUMP_TYPE_WDMA) argument
47 #define DUMP_WED_RRO_RING(_base)DUMP_RING("WED_RRO_MIOD", MTK_##_base, DUMP_TYPE_WED_RRO) argument
48 #define DUMP_WED_RRO_FDBK(_base)DUMP_RING("WED_RRO_FDBK", MTK_##_base, DUMP_TYPE_WED_RRO) argument
/drivers/gpu/drm/exynos/
A Dregs-decon7.h91 #define VIDW_BUF_START(_base, _win) ((_base) + ((_win) * 0x10)) argument
92 #define VIDW_BUF_START1(_base, _win) ((_base) + ((_win) * 0x10)) argument
93 #define VIDW_BUF_START2(_base, _win) ((_base) + ((_win) * 0x10)) argument
/drivers/gpio/
A Dgpio-i8255.h10 #define i8255_volatile_regmap_range(_base) regmap_reg_range(_base, _base + 0x2) argument
/drivers/clk/baikal-t1/
A Dccu-rst.c45 #define CCU_RST_TRIG(_base, _ofs) \ argument
48 .base = _base, \
52 #define CCU_RST_DIR(_base, _ofs) \ argument
55 .base = _base, \
A Dclk-ccu-div.c57 #define CCU_DIV_VAR_INFO(_id, _name, _pname, _base, _width, _flags, _features) \ argument
62 .base = _base, \
69 #define CCU_DIV_GATE_INFO(_id, _name, _pname, _base, _divider) \ argument
74 .base = _base, \
79 #define CCU_DIV_BUF_INFO(_id, _name, _pname, _base, _flags) \ argument
84 .base = _base, \
A Dclk-ccu-pll.c35 #define CCU_PLL_INFO(_id, _name, _pname, _base, _flags, _features) \ argument
40 .base = _base, \
/drivers/net/ethernet/intel/igc/
A Digc_i225.c61 if (hw->dev_spec._base.clear_semaphore_once) { in igc_get_hw_semaphore_i225()
62 hw->dev_spec._base.clear_semaphore_once = false; in igc_get_hw_semaphore_i225()
515 if (hw->dev_spec._base.eee_enable) { in igc_set_eee_i225()
573 if (hw->dev_spec._base.eee_enable && in igc_set_ltr_i225()
A Digc_hw.h192 struct igc_dev_spec_base _base; member
A Digc_base.c132 struct igc_dev_spec_base *dev_spec = &hw->dev_spec._base; in igc_init_mac_params_base()
A Digc_ethtool.c1746 edata->eee_enabled = hw->dev_spec._base.eee_enable; in igc_ethtool_get_eee()
1797 if (hw->dev_spec._base.eee_enable != edata->eee_enabled) { in igc_ethtool_set_eee()
1798 hw->dev_spec._base.eee_enable = edata->eee_enabled; in igc_ethtool_set_eee()
A Digc_main.c5879 adapter->hw.dev_spec._base.eee_enable = false; in igc_watchdog_task()
7330 hw->dev_spec._base.eee_enable = false; in igc_probe()
/drivers/gpu/drm/msm/adreno/
A Da6xx_gpu_state.h133 #define CLUSTER_DBGAHB(_id, _base, _type, _reg) \ argument
134 { .name = #_id, .statetype = _type, .base = _base, \
182 #define HLSQ_DBG_REGS(_base, _type, _array) \ argument
183 { .val0 = _base, .val1 = _type, .registers = _array, \
/drivers/scsi/aic94xx/
A Daic94xx_reg.c113 u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\
122 u32 map_offs = (reg - io_handle->ww##_base) + asd_mem_offs_##ww();\
/drivers/mtd/spi-nor/
A Dcore.h554 #define SNOR_OTP(_len, _n_regions, _base, _offset) \ argument
557 .base = (_base), \
/drivers/regulator/
A Drtq2208-regulator.c370 #define BUCK_RG_SHIFT(_base, _shift) (_base + _shift) argument
/drivers/gpu/drm/vc4/
A Dvc4_hdmi_regs.h166 #define _VC4_REG(_base, _reg, _offset) \ argument
169 .reg = _base, \
/drivers/net/wireless/mediatek/mt76/mt7915/
A Ddma.c125 #define PREFETCH(_base, _depth) ((_base) << 16 | (_depth)) in __mt7915_dma_prefetch() argument
/drivers/net/wireless/ralink/rt2x00/
A Drt2800.h2211 #define BEACON_BASE_TO_OFFSET(_base) (((_base) - 0x4000) / 64) argument
/drivers/clk/tegra/
A Dclk-tegra210.c3440 #define car_readl(_base, _off) readl_relaxed(clk_base + (_base) + ((_off) * 4)) argument
3441 #define car_writel(_val, _base, _off) \ argument
3442 writel_relaxed(_val, clk_base + (_base) + ((_off) * 4))
/drivers/net/ethernet/intel/ixgbe/
A Dixgbe_type.h1852 #define IXGBE_LED_OFFSET(_base, _i) (_base << (8 * (_i))) argument

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