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/drivers/clk/mediatek/
A Dclk-mt8188-infra_ao.c45 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
47 &mtk_clk_gate_ops_setclr, _flag)
52 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
54 &mtk_clk_gate_ops_setclr, _flag)
62 #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
64 &mtk_clk_gate_ops_setclr, _flag)
66 #define GATE_INFRA_AO3_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
68 &mtk_clk_gate_ops_setclr, _flag)
73 #define GATE_INFRA_AO4_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
75 &mtk_clk_gate_ops_setclr, _flag)
A Dclk-mt8195-infra_ao.c44 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
46 &mtk_clk_gate_ops_setclr, _flag)
51 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
53 &mtk_clk_gate_ops_setclr, _flag)
58 #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
60 &mtk_clk_gate_ops_setclr, _flag)
65 #define GATE_INFRA_AO3_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
67 &mtk_clk_gate_ops_setclr, _flag)
72 #define GATE_INFRA_AO4_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
74 &mtk_clk_gate_ops_setclr, _flag)
A Dclk-mt8186-infra_ao.c38 #define GATE_INFRA_AO0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
40 &mtk_clk_gate_ops_setclr, _flag)
45 #define GATE_INFRA_AO1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
47 &mtk_clk_gate_ops_setclr, _flag)
52 #define GATE_INFRA_AO2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
54 &mtk_clk_gate_ops_setclr, _flag)
59 #define GATE_INFRA_AO3_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
61 &mtk_clk_gate_ops_setclr, _flag)
A Dclk-mt8192.c752 #define GATE_INFRA1_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
754 &mtk_clk_gate_ops_setclr, _flag)
762 #define GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
764 &mtk_clk_gate_ops_setclr, _flag)
772 #define GATE_INFRA5_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
774 &mtk_clk_gate_ops_setclr, _flag)
A Dclk-mt8167-apmixedsys.c77 #define DIV_ADJ_FLAG(_id, _name, _parent, _reg, _shift, _width, _flag) { \ argument
84 .clk_divider_flags = _flag, \
A Dclk-mt8183.c685 #define GATE_INFRA2_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
687 _shift, &mtk_clk_gate_ops_setclr, _flag)
693 #define GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
695 _shift, &mtk_clk_gate_ops_setclr, _flag)
A Dclk-mt8195-topckgen.c1198 #define GATE_TOP0_FLAGS(_id, _name, _parent, _shift, _flag) \ argument
1200 &mtk_clk_gate_ops_no_setclr_inv, _flag)
/drivers/net/wireless/ath/ath5k/
A Ddesc.c174 #define _TX_FLAGS(_c, _flag) \ in ath5k_hw_setup_2word_tx_desc() argument
175 if (flags & AR5K_TXDESC_##_flag) { \ in ath5k_hw_setup_2word_tx_desc()
177 AR5K_2W_TX_DESC_CTL##_c##_##_flag; \ in ath5k_hw_setup_2word_tx_desc()
179 #define _TX_FLAGS_5211(_c, _flag) \ in ath5k_hw_setup_2word_tx_desc() argument
180 if (flags & AR5K_TXDESC_##_flag) { \ in ath5k_hw_setup_2word_tx_desc()
182 AR5K_2W_TX_DESC_CTL##_c##_##_flag##_5211; \ in ath5k_hw_setup_2word_tx_desc()
318 #define _TX_FLAGS(_c, _flag) \ in ath5k_hw_setup_4word_tx_desc() argument
319 if (flags & AR5K_TXDESC_##_flag) { \ in ath5k_hw_setup_4word_tx_desc()
320 txctl##_c |= AR5K_4W_TX_DESC_CTL##_c##_##_flag; \ in ath5k_hw_setup_4word_tx_desc()
/drivers/pinctrl/sophgo/
A Dpinctrl-sg2042.h40 #define SG2042_GENERAL_PIN(_id, _offset, _flag) \ argument
44 .flags = (_flag), \
/drivers/net/wireless/mediatek/mt7601u/
A Dmain.c106 #define MT76_FILTER(_flag, _hw) do { \ in mt76_configure_filter() argument
107 flags |= *total_flags & FIF_##_flag; \ in mt76_configure_filter()
109 dev->rxfilter |= !(flags & FIF_##_flag) * (_hw); \ in mt76_configure_filter()
/drivers/net/ethernet/wangxun/libwx/
A Dwx_type.h975 #define WX_SET_FLAG(_input, _flag, _result) \ argument
976 (((_flag) <= (_result)) ? \
977 ((u32)((_input) & (_flag)) * ((_result) / (_flag))) : \
978 ((u32)((_input) & (_flag)) / ((_flag) / (_result))))
/drivers/clk/renesas/
A Drzg2l-cpg.h197 #define DEF_DSI_DIV(_name, _id, _parent, _flag) \ argument
198 DEF_TYPE(_name, _id, CLK_TYPE_DSI_DIV, .parent = _parent, .flag = _flag)
/drivers/net/ethernet/intel/fm10k/
A Dfm10k_main.c874 #define FM10K_SET_FLAG(_input, _flag, _result) \ argument
875 ((_flag <= _result) ? \
876 ((u32)(_input & _flag) * (_result / _flag)) : \
877 ((u32)(_input & _flag) / (_flag / _result)))
/drivers/net/wireless/mediatek/mt76/
A Dmt76x02_util.c211 #define MT76_FILTER(_flag, _hw) do { \ in mt76x02_configure_filter() argument
212 flags |= *total_flags & FIF_##_flag; \ in mt76x02_configure_filter()
214 dev->mt76.rxfilter |= !(flags & FIF_##_flag) * (_hw); \ in mt76x02_configure_filter()
/drivers/net/wireless/mediatek/mt76/mt7603/
A Dmain.c251 #define MT76_FILTER(_flag, _hw) do { \ in mt7603_configure_filter() argument
252 flags |= *total_flags & FIF_##_flag; \ in mt7603_configure_filter()
254 dev->rxfilter |= !(flags & FIF_##_flag) * (_hw); \ in mt7603_configure_filter()
/drivers/clk/meson/
A Daxg-audio.c242 #define AUD_MST_MUX(_name, _reg, _flag) \ argument
243 AUD_MUX(_name##_sel, _reg, 0x7, 24, _flag, \
245 #define AUD_MST_DIV(_name, _reg, _flag) \ argument
246 AUD_DIV(_name##_div, _reg, 0, 16, _flag, \
/drivers/net/wireless/mediatek/mt76/mt7615/
A Dmain.c498 #define MT76_FILTER(_flag, _hw) do { \ in mt7615_configure_filter() argument
499 flags |= *total_flags & FIF_##_flag; \ in mt7615_configure_filter()
502 phy->rxfilter |= !(flags & FIF_##_flag) * (_hw);\ in mt7615_configure_filter()
/drivers/net/wireless/mediatek/mt76/mt7915/
A Dmain.c537 #define MT76_FILTER(_flag, _hw) do { \ in mt7915_configure_filter() argument
538 flags |= *total_flags & FIF_##_flag; \ in mt7915_configure_filter()
540 phy->rxfilter |= !(flags & FIF_##_flag) * (_hw); \ in mt7915_configure_filter()
/drivers/net/wireless/mediatek/mt76/mt7996/
A Dmain.c630 #define MT76_FILTER(_flag, _hw) do { \ in mt7996_configure_filter() argument
631 flags |= *total_flags & FIF_##_flag; \ in mt7996_configure_filter()
633 filter_set |= !(flags & FIF_##_flag) * (_hw); \ in mt7996_configure_filter()
/drivers/net/ethernet/intel/igc/
A Digc_main.c1244 #define IGC_SET_FLAG(_input, _flag, _result) \ argument
1245 (((_flag) <= (_result)) ? \
1246 ((u32)((_input) & (_flag)) * ((_result) / (_flag))) : \
1247 ((u32)((_input) & (_flag)) / ((_flag) / (_result))))
/drivers/net/ethernet/intel/igb/
A Digb_main.c6190 #define IGB_SET_FLAG(_input, _flag, _result) \ argument
6191 ((_flag <= _result) ? \
6192 ((u32)(_input & _flag) * (_result / _flag)) : \
6193 ((u32)(_input & _flag) / (_flag / _result)))
/drivers/net/ethernet/intel/ixgbe/
A Dixgbe_main.c8861 #define IXGBE_SET_FLAG(_input, _flag, _result) \ argument
8862 ((_flag <= _result) ? \
8863 ((u32)(_input & _flag) * (_result / _flag)) : \
8864 ((u32)(_input & _flag) / (_flag / _result)))
/drivers/net/wireless/ath/ath9k/
A Dar9003_eeprom.c39 #define CTL(_tpower, _flag) ((_tpower) | ((_flag) << 6)) argument
/drivers/scsi/qla2xxx/
A Dqla_init.c4056 #define PRINT_FIELD(_field, _flag, _str) { \ argument
4057 if (a0->_field & _flag) {\

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