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Searched refs:_pin (Results 1 – 25 of 25) sorted by relevance

/drivers/pinctrl/pxa/
A Dpinctrl-pxa2xx.h17 #define PXA_PIN(_pin, funcs...) \ argument
19 .pin = _pin, \
24 #define PXA_GPIO_PIN(_pin, funcs...) \ argument
26 .pin = _pin, \
33 #define PXA_GPIO_ONLY_PIN(_pin) \ argument
35 .pin = _pin, \
/drivers/pinctrl/stm32/
A Dpinctrl-stm32.h43 #define STM32_PIN(_pin, ...) \ argument
45 .pin = _pin, \
50 #define STM32_PIN_PKG(_pin, _pkg, ...) \ argument
52 .pin = _pin, \
/drivers/pinctrl/mediatek/
A Dpinctrl-mtk-common.h41 #define MTK_PIN(_pin, _pad, _chip, _eint, ...) \ argument
43 .pin = _pin, \
109 #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ argument
111 .pin = _pin, \
134 #define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \ argument
136 .pin = _pin, \
A Dpinctrl-mt2701.c30 #define MTK_PINMUX_SPEC(_pin, _offset, _bit) \ argument
32 .pin = _pin, \
A Dpinctrl-mt8135.c35 #define SPEC_PULL(_pin, _pupd_offset, _pupd_bit, _r0_offset, \ argument
38 .pin = _pin, \
/drivers/pinctrl/renesas/
A Dpinctrl.c541 int idx = sh_pfc_get_pin_index(pfc, _pin); in sh_pfc_pinconf_validate()
574 if (!sh_pfc_pinconf_validate(pfc, _pin, param)) in sh_pfc_pinconf_get()
587 bias = pfc->info->ops->get_bias(pfc, _pin); in sh_pfc_pinconf_get()
600 ret = sh_pfc_pinconf_get_drive_strength(pfc, _pin); in sh_pfc_pinconf_get()
609 int idx = sh_pfc_get_pin_index(pfc, _pin); in sh_pfc_pinconf_get()
618 bit = pfc->info->ops->pin_to_pocctrl(_pin, &pocctrl); in sh_pfc_pinconf_get()
619 if (WARN(bit < 0, "invalid pin %#x", _pin)) in sh_pfc_pinconf_get()
652 if (!sh_pfc_pinconf_validate(pfc, _pin, param)) in sh_pfc_pinconf_set()
663 pfc->info->ops->set_bias(pfc, _pin, param); in sh_pfc_pinconf_set()
682 int idx = sh_pfc_get_pin_index(pfc, _pin); in sh_pfc_pinconf_set()
[all …]
A Dpinctrl-rzg2l.c1051 u8 pin = RZG2L_PIN_ID_TO_PIN(_pin); in rzg2l_pin_to_oen_bit()
1072 bit = rzg2l_pin_to_oen_bit(pctrl, _pin); in rzg2l_read_oen()
1085 bit = rzg2l_pin_to_oen_bit(pctrl, _pin); in rzg2l_write_oen()
1109 port = RZG2L_PIN_ID_TO_PORT(_pin); in rzg3s_pin_to_oen_bit()
1110 pin = RZG2L_PIN_ID_TO_PIN(_pin); in rzg3s_pin_to_oen_bit()
1125 bit = rzg3s_pin_to_oen_bit(pctrl, _pin); in rzg3s_oen_read()
1138 bit = rzg3s_pin_to_oen_bit(pctrl, _pin); in rzg3s_oen_write()
1271 unsigned int _pin, in rzg2l_pinctrl_pinconf_get() argument
1293 bit = RZG2L_PIN_ID_TO_PIN(_pin); in rzg2l_pinctrl_pinconf_get()
1430 unsigned int _pin, in rzg2l_pinctrl_pinconf_set() argument
[all …]
A Dsh_pfc.h617 .pin = (bank * 32) + _pin, \
671 #define PINMUX_GPIO(_pin) \ argument
672 [GPIO_##_pin] = { \
674 .name = __stringify(GPIO_##_pin), \
675 .enum_id = _pin##_DATA, \
679 #define SH_PFC_PIN_CFG(_pin, cfgs) { \ argument
680 .pin = _pin, \
681 .name = __stringify(PORT##_pin), \
682 .enum_id = PORT##_pin##_DATA, \
733 #define _NOGP_PINMUX(_pin, _name, cfg) { \ argument
[all …]
A Dpinctrl-rzv2m.c454 unsigned int _pin, in rzv2m_pinctrl_pinconf_get() argument
459 const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[_pin]; in rzv2m_pinctrl_pinconf_get()
476 port = RZV2M_PIN_ID_TO_PORT(_pin); in rzv2m_pinctrl_pinconf_get()
477 bit = RZV2M_PIN_ID_TO_PIN(_pin); in rzv2m_pinctrl_pinconf_get()
479 if (rzv2m_validate_gpio_pin(pctrl, *pin_data, RZV2M_PIN_ID_TO_PORT(_pin), bit)) in rzv2m_pinctrl_pinconf_get()
557 unsigned int _pin, in rzv2m_pinctrl_pinconf_set() argument
562 const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[_pin]; in rzv2m_pinctrl_pinconf_set()
580 port = RZV2M_PIN_ID_TO_PORT(_pin); in rzv2m_pinctrl_pinconf_set()
581 bit = RZV2M_PIN_ID_TO_PIN(_pin); in rzv2m_pinctrl_pinconf_set()
583 if (rzv2m_validate_gpio_pin(pctrl, *pin_data, RZV2M_PIN_ID_TO_PORT(_pin), bit)) in rzv2m_pinctrl_pinconf_set()
/drivers/pinctrl/sunxi/
A Dpinctrl-sunxi.h184 #define SUNXI_PIN(_pin, ...) \ argument
186 .pin = _pin, \
191 #define SUNXI_PIN_VARIANT(_pin, _variant, ...) \ argument
193 .pin = _pin, \
/drivers/pinctrl/sophgo/
A Dpinctrl-sg2042.h32 #define sophgo_to_sg2042_pin(_pin) \ argument
33 container_of((_pin), struct sg2042_pin, pin)
A Dpinctrl-cv18xx.h60 #define sophgo_to_cv1800_pin(_pin) \ argument
61 container_of((_pin), struct cv1800_pin, pin)
/drivers/pinctrl/visconti/
A Dpinctrl-common.h26 #define VISCONTI_PIN(_pin, dsel, d_sh, pude, pudsel, p_sh) \ argument
28 .pin = _pin, \
A Dpinctrl-common.c37 unsigned int _pin, in visconti_pin_config_set() argument
42 const struct visconti_desc_pin *pin = &priv->devdata->pins[_pin]; in visconti_pin_config_set()
49 dev_dbg(priv->dev, "%s: pin = %d (%s)\n", __func__, _pin, pin->pin.name); in visconti_pin_config_set()
/drivers/pinctrl/
A Dpinctrl-pistachio.c635 #define PIN_GROUP(_pin, _name) \ argument
638 .pin = PISTACHIO_PIN_##_pin, \
649 #define MFIO_PIN_GROUP(_pin, _func) \ argument
651 .name = "mfio" #_pin, \
652 .pin = PISTACHIO_PIN_MFIO(_pin), \
663 #define MFIO_MUX_PIN_GROUP(_pin, _f0, _f1, _f2, _reg, _shift, _mask) \ argument
665 .name = "mfio" #_pin, \
666 .pin = PISTACHIO_PIN_MFIO(_pin), \
A Dpinctrl-pic32.c372 #define PIC32_PINCTRL_GROUP(_pin, _name, ...) \ argument
375 .pin = _pin, \
/drivers/pinctrl/cirrus/
A Dpinctrl-lochnagar.c54 static const struct lochnagar_pin lochnagar##REV##_##ID##_pin = { \
60 static const struct lochnagar_pin lochnagar##REV##_##ID##_pin = \
73 static const struct lochnagar_pin lochnagar1_##ID##_pin = \
82 static const struct lochnagar_pin lochnagar2_##ID##_pin = \
95 .name = lochnagar##REV##_##ID##_pin.name, \
96 .drv_data = (void *)&lochnagar##REV##_##ID##_pin, \
444 LN_FUNC(lochnagar##REV##_##ID##_pin.name, PIN, OP)
609 .name = lochnagar##REV##_##ID##_pin.name, \
/drivers/iio/proximity/
A Dsx9324.c76 #define SX9324_REG_AFE_PH0_PIN_MASK(_pin) \ argument
77 GENMASK(2 * (_pin) + 1, 2 * (_pin))
/drivers/net/ethernet/intel/ice/
A Dice_ptp_hw.h211 #define E810T_CGU_INPUT_C827(_phy, _pin) ((_phy) * ICE_E810_RCLK_PINS_NUM + \ argument
212 (_pin) + ZL_REF1P)
/drivers/clk/qcom/
A Dclk-smd-rpm.c154 __DEFINE_CLK_SMD_RPM_BRANCH(_name##_pin, _name##_a##_pin, \
/drivers/pinctrl/realtek/
A Dpinctrl-rtd1315e.c231 #define DECLARE_RTD1315E_PIN(_pin, _name) \ argument
232 static const unsigned int rtd1315e_## _name ##_pins[] __maybe_unused = { _pin }
A Dpinctrl-rtd1319d.c237 #define DECLARE_RTD1319D_PIN(_pin, _name) \ argument
238 static const unsigned int rtd1319d_## _name ##_pins[] __maybe_unused = { _pin }
A Dpinctrl-rtd1619b.c246 #define DECLARE_RTD1619B_PIN(_pin, _name) \ argument
247 static const unsigned int rtd1619b_## _name ##_pins[] = { _pin }
/drivers/pinctrl/bcm/
A Dpinctrl-bcm281xx.c396 { .number = a, .name = b, .drv_data = &c##_pin }
/drivers/soc/tegra/
A Dpmc.c328 #define TEGRA_WAKE_GPIO(_name, _id, _instance, _pin) \ argument
335 .pin = _pin, \

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