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Searched refs:_pname (Results 1 – 12 of 12) sorted by relevance

/drivers/clk/pistachio/
A Dclk.h19 #define GATE(_id, _name, _pname, _reg, _shift) \ argument
25 .parent = _pname, \
59 #define DIV(_id, _name, _pname, _reg, _width) \ argument
66 .parent = _pname, \
76 .parent = _pname, \
86 #define FIXED_FACTOR(_id, _name, _pname, _div) \ argument
91 .parent = _pname, \
119 #define PLL(_id, _name, _pname, _type, _reg, _rates) \ argument
127 .parent = _pname, \
130 #define PLL_FIXED(_id, _name, _pname, _type, _reg) \ argument
[all …]
/drivers/clk/x86/
A Dclk-cgu.h153 .fw_name = _pname, \
154 .name = _pname, \
226 .fw_name = _pname, \
227 .name = _pname, \
248 .fw_name = _pname, \
249 .name = _pname, \
251 .num_parents = !_pname ? 0 : 1, \
266 .fw_name = _pname, \
267 .name = _pname, \
286 .fw_name = _pname, \
[all …]
/drivers/clk/meson/
A Dclk-regmap.h121 #define __MESON_PCLK(_name, _reg, _bit, _ops, _pname) \ argument
130 .parent_hws = (const struct clk_hw *[]) { _pname }, \
136 #define MESON_PCLK(_name, _reg, _bit, _pname) \ argument
137 __MESON_PCLK(_name, _reg, _bit, &clk_regmap_gate_ops, _pname)
139 #define MESON_PCLK_RO(_name, _reg, _bit, _pname) \ argument
140 __MESON_PCLK(_name, _reg, _bit, &clk_regmap_gate_ro_ops, _pname)
A Daxg-audio.c80 #define AUD_GATE(_name, _reg, _bit, _pname, _iflags) { \ argument
88 .parent_names = (const char *[]){ #_pname }, \
120 .parent_names = (const char *[]){ #_pname }, \
140 _hi_shift, _hi_width, _pname, _iflags) { \ argument
156 .parent_names = (const char *[]){ #_pname }, \
163 _pname, _iflags) { \ argument
184 .parent_names = (const char *[]){ #_pname }, \
190 #define AUD_PHASE(_name, _reg, _width, _shift, _pname, _iflags) { \ argument
201 .parent_names = (const char *[]){ #_pname }, \
207 #define AUD_SCLK_WS(_name, _reg, _width, _shift_ph, _shift_ws, _pname, \ argument
[all …]
/drivers/clk/
A Dclk-loongson2.c61 #define CLK_DIV(_id, _name, _pname, _offset, _dshift, _dwidth) \ argument
66 .parent_name = _pname, \
86 #define CLK_SCALE(_id, _name, _pname, _offset, \ argument
92 .parent_name = _pname, \
98 #define CLK_GATE(_id, _name, _pname, _offset, _bidx) \ argument
103 .parent_name = _pname, \
108 #define CLK_FIXED(_id, _name, _pname, _rate) \ argument
113 .parent_name = _pname, \
A Dclk-loongson1.c177 #define LS1X_CLK_DIV(_name, _pname, _offset, _shift, _width, \ argument
193 .parent_hws = (const struct clk_hw *[]) { _pname }, \
/drivers/clk/baikal-t1/
A Dclk-ccu-div.c57 #define CCU_DIV_VAR_INFO(_id, _name, _pname, _base, _width, _flags, _features) \ argument
61 .parent_name = _pname, \
69 #define CCU_DIV_GATE_INFO(_id, _name, _pname, _base, _divider) \ argument
73 .parent_name = _pname, \
79 #define CCU_DIV_BUF_INFO(_id, _name, _pname, _base, _flags) \ argument
83 .parent_name = _pname, \
89 #define CCU_DIV_FIXED_INFO(_id, _name, _pname, _divider) \ argument
93 .parent_name = _pname, \
A Dclk-ccu-pll.c35 #define CCU_PLL_INFO(_id, _name, _pname, _base, _flags, _features) \ argument
39 .parent_name = _pname, \
/drivers/regulator/
A Dtps6586x-regulator.c157 #define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \ argument
160 TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \
164 #define TPS6586X_LDO_LINEAR(_id, _pname, n_volt, min_uv, uv_step, vreg, \ argument
167 TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \
172 #define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \ argument
175 TPS6586X_REGULATOR(_id, ro, _pname, vdata, vreg, shift, nbits, \
179 #define TPS6586X_DVM(_id, _pname, n_volt, min_uv, uv_step, vreg, shift, \ argument
182 TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \
/drivers/clk/samsung/
A Dclk.h271 #define __PLL(_typ, _id, _name, _pname, _flags, _lock, _con, _rtable) \ argument
276 .parent_name = _pname, \
283 #define PLL(_typ, _id, _name, _pname, _lock, _con, _rtable) \ argument
284 __PLL(_typ, _id, _name, _pname, CLK_GET_RATE_NOCACHE, _lock, \
/drivers/clk/ralink/
A Dclk-mt7621.c62 #define GATE(_id, _name, _pname, _shift) \ argument
66 .parent_name = _pname, \
/drivers/ufs/core/
A Dufs-sysfs.c1426 #define UFS_STRING_DESCRIPTOR(_name, _pname) \ argument
1454 index = desc_buf[DEVICE_DESC_PARAM##_pname]; \
1974 #define UFS_LUN_DESC_PARAM(_pname, _puname, _duname, _size) \ argument
1975 static ssize_t _pname##_show(struct device *dev, \
1986 static DEVICE_ATTR_RO(_pname)

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