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Searched refs:addr_offset (Results 1 – 25 of 27) sorted by relevance

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/drivers/net/phy/
A Dphy_package.c56 unsigned int addr_offset) in phy_package_address() argument
61 if (addr_offset >= PHY_MAX_ADDR - base_addr) in phy_package_address()
67 return base_addr + addr_offset; in phy_package_address()
70 int __phy_package_read(struct phy_device *phydev, unsigned int addr_offset, in __phy_package_read() argument
73 int addr = phy_package_address(phydev, addr_offset); in __phy_package_read()
82 int __phy_package_write(struct phy_device *phydev, unsigned int addr_offset, in __phy_package_write() argument
85 int addr = phy_package_address(phydev, addr_offset); in __phy_package_write()
110 unsigned int addr_offset, int devad, in __phy_package_read_mmd() argument
113 int addr = phy_package_address(phydev, addr_offset); in __phy_package_read_mmd()
143 unsigned int addr_offset, int devad, in __phy_package_write_mmd() argument
[all …]
A Dphylib.h14 int __phy_package_read(struct phy_device *phydev, unsigned int addr_offset,
16 int __phy_package_write(struct phy_device *phydev, unsigned int addr_offset,
19 unsigned int addr_offset, int devad,
22 unsigned int addr_offset, int devad,
/drivers/misc/
A Dpch_phub.c492 unsigned int addr_offset; in pch_phub_bin_read() local
525 addr_offset = 0; in pch_phub_bin_read()
529 addr_offset = 0; in pch_phub_bin_read()
533 for (addr_offset = 0; addr_offset < count; addr_offset++) { in pch_phub_bin_read()
536 &buf[addr_offset]); in pch_phub_bin_read()
545 return addr_offset; in pch_phub_bin_read()
570 addr_offset = 0; in pch_phub_bin_write()
574 addr_offset = 0; in pch_phub_bin_write()
584 for (addr_offset = 0; addr_offset < count; addr_offset++) { in pch_phub_bin_write()
590 buf[addr_offset]); in pch_phub_bin_write()
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/drivers/nvmem/
A Drockchip-efuse.c99 unsigned int addr_start, addr_end, addr_offset, addr_len; in rockchip_rk3328_efuse_read() local
114 addr_offset = offset % RK3399_NBYTES; in rockchip_rk3328_efuse_read()
141 memcpy(val, buf + addr_offset, bytes); in rockchip_rk3328_efuse_read()
154 unsigned int addr_start, addr_end, addr_offset, addr_len; in rockchip_rk3399_efuse_read() local
167 addr_offset = offset % RK3399_NBYTES; in rockchip_rk3399_efuse_read()
197 memcpy(val, buf + addr_offset, bytes); in rockchip_rk3399_efuse_read()
/drivers/spi/
A Dspi-fsl-qspi.c646 u32 addr_offset = 0; in fsl_qspi_exec_op() local
659 addr_offset = q->memmap_phy; in fsl_qspi_exec_op()
662 q->selected * q->devtype_data->ahb_buf_size + addr_offset, in fsl_qspi_exec_op()
724 u32 reg, addr_offset = 0; in fsl_qspi_default_setup() local
777 addr_offset = q->memmap_phy; in fsl_qspi_default_setup()
786 qspi_writel(q, q->devtype_data->ahb_buf_size + addr_offset, in fsl_qspi_default_setup()
788 qspi_writel(q, q->devtype_data->ahb_buf_size * 2 + addr_offset, in fsl_qspi_default_setup()
790 qspi_writel(q, q->devtype_data->ahb_buf_size * 3 + addr_offset, in fsl_qspi_default_setup()
792 qspi_writel(q, q->devtype_data->ahb_buf_size * 4 + addr_offset, in fsl_qspi_default_setup()
/drivers/net/can/m_can/
A Dm_can.h67 int (*read_fifo)(struct m_can_classdev *cdev, int addr_offset, void *val, size_t val_count);
68 int (*write_fifo)(struct m_can_classdev *cdev, int addr_offset,
A Dtcan4x5x-core.c191 static int tcan4x5x_read_fifo(struct m_can_classdev *cdev, int addr_offset, in tcan4x5x_read_fifo() argument
196 return regmap_bulk_read(priv->regmap, TCAN4X5X_MRAM_START + addr_offset, val, val_count); in tcan4x5x_read_fifo()
207 int addr_offset, const void *val, size_t val_count) in tcan4x5x_write_fifo() argument
211 return regmap_bulk_write(priv->regmap, TCAN4X5X_MRAM_START + addr_offset, val, val_count); in tcan4x5x_write_fifo()
A Dm_can.c345 u32 addr_offset = cdev->mcfg[MRAM_RXF0].off + fgi * RXF0_ELEMENT_SIZE + in m_can_fifo_read() local
351 return cdev->ops->read_fifo(cdev, addr_offset, val, val_count); in m_can_fifo_read()
358 u32 addr_offset = cdev->mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE + in m_can_fifo_write() local
364 return cdev->ops->write_fifo(cdev, addr_offset, val, val_count); in m_can_fifo_write()
376 u32 addr_offset = cdev->mcfg[MRAM_TXE].off + fgi * TXE_ELEMENT_SIZE + in m_can_txe_fifo_read() local
379 return cdev->ops->read_fifo(cdev, addr_offset, val, 1); in m_can_txe_fifo_read()
/drivers/mtd/nand/raw/ingenic/
A Dingenic_nand_drv.c31 unsigned long addr_offset; member
273 cs->base + nfc->soc_info->addr_offset); in ingenic_nand_exec_instr()
525 .addr_offset = 0x00010000,
532 .addr_offset = 0x00010000,
539 .addr_offset = 0x00800000,
/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_mes.c373 uint32_t addr_offset = 0; in amdgpu_mes_rreg() local
377 if (amdgpu_device_wb_get(adev, &addr_offset)) { in amdgpu_mes_rreg()
381 read_val_gpu_addr = adev->wb.gpu_addr + (addr_offset * 4); in amdgpu_mes_rreg()
382 read_val_ptr = (uint32_t *)&adev->wb.wb[addr_offset]; in amdgpu_mes_rreg()
401 if (addr_offset) in amdgpu_mes_rreg()
402 amdgpu_device_wb_free(adev, addr_offset); in amdgpu_mes_rreg()
/drivers/input/rmi4/
A Drmi_i2c.c134 u8 addr_offset = addr & 0xff; in rmi_i2c_read_block() local
139 .len = sizeof(addr_offset), in rmi_i2c_read_block()
140 .buf = &addr_offset, in rmi_i2c_read_block()
/drivers/ntb/
A Dmsi.c211 msi_desc->addr_offset = addr - ntb->msi->base_addr; in ntb_msi_set_desc()
369 idx = desc->addr_offset / sizeof(*ntb->msi->peer_mws[peer]); in ntb_msi_peer_trigger()
404 *msi_addr = mw_phys_addr + desc->addr_offset; in ntb_msi_peer_addr()
A Dntb_transport.c706 qp->peer_msi_desc.addr_offset = in ntb_transport_setup_qp_peer_msi()
712 qp_num, qp->peer_msi_desc.addr_offset, qp->peer_msi_desc.data); in ntb_transport_setup_qp_peer_msi()
714 if (qp->peer_msi_desc.addr_offset) { in ntb_transport_setup_qp_peer_msi()
752 rc = ntb_spad_write(qp->ndev, spad, qp->msi_desc.addr_offset); in ntb_transport_setup_qp_msi()
761 qp_num, qp->msi_irq, qp->msi_desc.addr_offset, in ntb_transport_setup_qp_msi()
/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/
A Dinput_system.c290 int addr_offset; in input_switch_cfg() local
296 for (addr_offset = 0; addr_offset < N_RX_CHANNEL_ID * 2; addr_offset++) { in input_switch_cfg()
297 assert(addr_offset * SIZEOF_HRT_REG + _REG_GP_IFMT_input_switch_lut_reg0 <= in input_switch_cfg()
300 _REG_GP_IFMT_input_switch_lut_reg0 + addr_offset * SIZEOF_HRT_REG, in input_switch_cfg()
301 cfg->hsync_data_reg[addr_offset]); in input_switch_cfg()
/drivers/ntb/test/
A Dntb_msi_test.c88 nm->isr_ctx[i].desc.addr_offset); in ntb_msit_setup_work()
113 nm->isr_ctx[i].desc.addr_offset); in ntb_msit_desc_changed()
138 desc[i].addr_offset = ntb_peer_spad_read(nm->ntb, peer, in ntb_msit_copy_peer_desc()
/drivers/net/ethernet/alacritech/
A Dslicoss.c441 buff->addr_offset = offset; in slic_refill_rx_queue()
570 buff->addr_offset + sizeof(*desc), in slic_handle_receive()
578 buff->addr_offset + in slic_handle_receive()
807 stq->addr_offset[i] = offset; in slic_init_stat_queue()
817 stq->descs[i] - stq->addr_offset[i], in slic_init_stat_queue()
818 stq->paddr[i] - stq->addr_offset[i]); in slic_init_stat_queue()
831 stq->descs[i] - stq->addr_offset[i], in slic_free_stat_queue()
832 stq->paddr[i] - stq->addr_offset[i]); in slic_free_stat_queue()
A Dslic.h478 unsigned int addr_offset[SLIC_NUM_STAT_DESC_ARRAYS]; member
525 unsigned int addr_offset; member
/drivers/net/ethernet/huawei/hinic/
A Dhinic_hw_qp.c83 qp_ctxt_hdr->addr_offset = SQ_CTXT_OFFSET(max_sqs, max_rqs, 0); in hinic_qp_prepare_header()
85 qp_ctxt_hdr->addr_offset = RQ_CTXT_OFFSET(max_sqs, max_rqs, 0); in hinic_qp_prepare_header()
87 qp_ctxt_hdr->addr_offset = SIZE_16BYTES(qp_ctxt_hdr->addr_offset); in hinic_qp_prepare_header()
A Dhinic_hw_qp_ctxt.h151 u32 addr_offset; member
A Dhinic_hw_io.c227 ctxt_block->cmdq_hdr.addr_offset = 0; in hinic_clean_queue_offload_ctxt()
/drivers/media/platform/qcom/iris/
A Diris_hfi_gen2_packet.h96 u32 addr_offset; member
/drivers/net/wireless/intel/iwlwifi/fw/api/
A Ddbg-tlv.h309 __le32 addr_offset; member
/drivers/pci/controller/
A Dpcie-rockchip-ep.c254 size_t *pci_size, size_t *addr_offset) in rockchip_pcie_ep_align_addr() argument
270 *addr_offset = offset; in rockchip_pcie_ep_align_addr()
/drivers/crypto/intel/qat/qat_common/
A Dicp_qat_uclo.h339 unsigned int addr_offset; member
/drivers/net/wireless/intel/iwlwifi/
A Diwl-dbg-tlv.c861 u32 offset = le32_to_cpu(config_list->addr_offset); in iwl_dbg_tlv_apply_config()
917 le32_to_cpu(config_list->addr_offset)); in iwl_dbg_tlv_apply_config()

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