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Searched refs:alignment (Results 1 – 25 of 124) sorted by relevance

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/drivers/misc/
A Dpci_endpoint_test.c130 size_t alignment; member
137 size_t alignment; member
497 size_t alignment = test->alignment; in pci_endpoint_test_copy() local
540 if (alignment && !IS_ALIGNED(orig_src_phys_addr, alignment)) { in pci_endpoint_test_copy()
572 if (alignment && !IS_ALIGNED(orig_dst_phys_addr, alignment)) { in pci_endpoint_test_copy()
630 size_t alignment = test->alignment; in pci_endpoint_test_write() local
674 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) { in pci_endpoint_test_write()
728 size_t alignment = test->alignment; in pci_endpoint_test_read() local
769 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) { in pci_endpoint_test_read()
1032 test->alignment = data->alignment; in pci_endpoint_test_probe()
[all …]
/drivers/gpu/drm/i915/
A Di915_gem_gtt.c192 u64 size, u64 alignment, unsigned long color, in i915_gem_gtt_insert() argument
203 GEM_BUG_ON(alignment && !is_power_of_2(alignment)); in i915_gem_gtt_insert()
204 GEM_BUG_ON(alignment && !IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT)); in i915_gem_gtt_insert()
214 if (unlikely(round_up(start, alignment) > round_down(end - size, alignment))) in i915_gem_gtt_insert()
230 if (alignment <= I915_GTT_MIN_ALIGNMENT) in i915_gem_gtt_insert()
231 alignment = 0; in i915_gem_gtt_insert()
234 size, alignment, color, in i915_gem_gtt_insert()
241 size, alignment, color, in i915_gem_gtt_insert()
275 size, alignment ?: I915_GTT_MIN_ALIGNMENT); in i915_gem_gtt_insert()
284 err = i915_gem_evict_something(vm, ww, size, alignment, color, in i915_gem_gtt_insert()
[all …]
A Di915_vma.c688 u64 size, u64 alignment, u64 flags) in i915_vma_misplaced() argument
699 GEM_BUG_ON(alignment && !is_power_of_2(alignment)); in i915_vma_misplaced()
700 if (alignment && !IS_ALIGNED(i915_vma_offset(vma), alignment)) in i915_vma_misplaced()
789 u64 size, u64 alignment, u64 flags) in i915_vma_insert() argument
800 alignment = max_t(typeof(alignment), alignment, vma->display_alignment); in i915_vma_insert()
803 alignment = max_t(typeof(alignment), in i915_vma_insert()
804 alignment, vma->fence_alignment); in i915_vma_insert()
821 guard = ALIGN(guard, alignment); in i915_vma_insert()
833 alignment = max(alignment, i915_vm_obj_min_alignment(vma->vm, vma->obj)); in i915_vma_insert()
902 alignment = max(alignment, page_alignment); in i915_vma_insert()
[all …]
A Di915_gem.h59 u64 size, u64 alignment, u64 flags);
64 u64 size, u64 alignment, u64 flags);
/drivers/gpu/drm/msm/disp/dpu1/
A Dmsm_media_info.h1072 unsigned int alignment = 0, bpp = 4; in VENUS_RGB_STRIDE() local
1079 alignment = 128; in VENUS_RGB_STRIDE()
1082 alignment = 256; in VENUS_RGB_STRIDE()
1087 alignment = 256; in VENUS_RGB_STRIDE()
1093 return MSM_MEDIA_ALIGN(width * bpp, alignment); in VENUS_RGB_STRIDE()
1098 unsigned int alignment = 0; in VENUS_RGB_SCANLINES() local
1105 alignment = 32; in VENUS_RGB_SCANLINES()
1110 alignment = 16; in VENUS_RGB_SCANLINES()
1116 return MSM_MEDIA_ALIGN(height, alignment); in VENUS_RGB_SCANLINES()
/drivers/gpu/drm/tests/
A Ddrm_mm_test.c92 static u64 misalignment(struct drm_mm_node *node, u64 alignment) in misalignment() argument
96 if (!alignment) in misalignment()
99 div64_u64_rem(node->start, alignment, &rem); in misalignment()
104 u64 size, u64 alignment, unsigned long color) in assert_node() argument
119 if (misalignment(node, alignment)) { in assert_node()
122 node->start, misalignment(node, alignment), alignment); in assert_node()
218 struct drm_mm_node *node, u64 size, u64 alignment, unsigned long color, in expect_insert() argument
224 size, alignment, color, in expect_insert()
229 size, alignment, color, mode->name, err); in expect_insert()
233 if (!assert_node(test, node, mm, size, alignment, color)) { in expect_insert()
/drivers/gpu/drm/i915/display/
A Dintel_fb_pin.c25 unsigned int alignment, in intel_fb_pin_to_dpt() argument
82 if (i915_vma_misplaced(vma, 0, alignment, 0)) { in intel_fb_pin_to_dpt()
88 ret = i915_vma_pin_ww(vma, &ww, 0, alignment, PIN_GLOBAL); in intel_fb_pin_to_dpt()
97 vma->display_alignment = max(vma->display_alignment, alignment); in intel_fb_pin_to_dpt()
111 unsigned int alignment, in intel_fb_pin_to_ggtt() argument
131 if (drm_WARN_ON(dev, alignment && !is_power_of_2(alignment))) in intel_fb_pin_to_ggtt()
169 vma = i915_gem_object_pin_to_display_plane(obj, &ww, alignment, in intel_fb_pin_to_ggtt()
292 unsigned int alignment = intel_plane_fb_min_alignment(plane_state); in intel_plane_pin_fb() local
294 vma = intel_dpt_pin_to_ggtt(fb->dpt_vm, alignment / 512); in intel_plane_pin_fb()
301 alignment, &plane_state->flags, in intel_plane_pin_fb()
/drivers/bluetooth/
A Dhci_h4.c159 u8 alignment = hu->alignment ? hu->alignment : 1; in h4_recv_buf() local
255 hu->padding = (skb->len + 1) % alignment; in h4_recv_buf()
256 hu->padding = (alignment - hu->padding) % alignment; in h4_recv_buf()
263 hu->padding = (skb->len + 1) % alignment; in h4_recv_buf()
264 hu->padding = (alignment - hu->padding) % alignment; in h4_recv_buf()
/drivers/gpu/drm/
A Ddrm_mm.c516 u64 size, u64 alignment, in drm_mm_insert_node_in_range() argument
533 if (alignment <= 1) in drm_mm_insert_node_in_range()
534 alignment = 0; in drm_mm_insert_node_in_range()
539 remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0; in drm_mm_insert_node_in_range()
568 if (alignment) { in drm_mm_insert_node_in_range()
704 u64 alignment, in drm_mm_scan_init_with_range() argument
716 if (alignment <= 1) in drm_mm_scan_init_with_range()
717 alignment = 0; in drm_mm_scan_init_with_range()
720 scan->alignment = alignment; in drm_mm_scan_init_with_range()
721 scan->remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0; in drm_mm_scan_init_with_range()
[all …]
/drivers/mtd/ubi/
A Dvmt.c34 __ATTR(alignment, S_IRUGO, vol_attribute_show, NULL);
85 ret = sprintf(buf, "%d\n", vol->alignment); in vol_attribute_show()
247 vol->alignment = req->alignment; in ubi_create_volume()
248 vol->data_pad = ubi->leb_size % vol->alignment; in ubi_create_volume()
307 vtbl_rec.alignment = cpu_to_be32(vol->alignment); in ubi_create_volume()
707 if (vol->alignment > ubi->leb_size || vol->alignment == 0) { in self_check_volume()
712 n = vol->alignment & (ubi->min_io_size - 1); in self_check_volume()
713 if (vol->alignment != 1 && n) { in self_check_volume()
718 n = ubi->leb_size % vol->alignment; in self_check_volume()
798 alignment = be32_to_cpu(ubi->vtbl[vol_id].alignment); in self_check_volume()
[all …]
A Dvtbl.c160 int i, n, reserved_pebs, alignment, data_pad, vol_type, name_len; in vtbl_check() local
169 alignment = be32_to_cpu(vtbl[i].alignment); in vtbl_check()
193 if (reserved_pebs < 0 || alignment < 0 || data_pad < 0 || in vtbl_check()
199 if (alignment > ubi->leb_size || alignment == 0) { in vtbl_check()
204 n = alignment & (ubi->min_io_size - 1); in vtbl_check()
205 if (alignment != 1 && n) { in vtbl_check()
210 n = ubi->leb_size % alignment; in vtbl_check()
539 vol->alignment = be32_to_cpu(vtbl[i].alignment); in init_volumes()
631 vol->alignment = UBI_LAYOUT_VOLUME_ALIGN; in init_volumes()
/drivers/gpu/drm/qxl/
A Dqxl_gem.c46 int alignment, int initial_domain, in qxl_gem_object_create() argument
56 if (alignment < PAGE_SIZE) in qxl_gem_object_create()
57 alignment = PAGE_SIZE; in qxl_gem_object_create()
63 size, initial_domain, alignment, r); in qxl_gem_object_create()
/drivers/gpu/drm/xe/display/
A Dxe_fb_pin.c84 unsigned int alignment) in __xe_pin_fb_vma_dpt() argument
110 alignment); in __xe_pin_fb_vma_dpt()
118 alignment); in __xe_pin_fb_vma_dpt()
126 alignment); in __xe_pin_fb_vma_dpt()
199 unsigned int alignment) in __xe_pin_fb_vma_ggtt() argument
276 unsigned int alignment) in __xe_pin_fb_vma() argument
326 ret = __xe_pin_fb_vma_dpt(fb, view, vma, alignment); in __xe_pin_fb_vma()
328 ret = __xe_pin_fb_vma_ggtt(fb, view, vma, alignment); in __xe_pin_fb_vma()
365 unsigned int alignment, in intel_fb_pin_to_ggtt() argument
420 unsigned int alignment = plane->min_alignment(plane, fb, 0); in intel_plane_pin_fb() local
[all …]
/drivers/dma/
A Ddmatest.c83 static int alignment = -1; variable
84 module_param(alignment, int, 0644);
126 int alignment; member
621 align = params->alignment < 0 ? dev->copy_align : in dmatest_func()
622 params->alignment; in dmatest_func()
626 params->alignment; in dmatest_func()
633 align = params->alignment < 0 ? dev->xor_align : in dmatest_func()
634 params->alignment; in dmatest_func()
639 align = params->alignment < 0 ? dev->pq_align : in dmatest_func()
640 params->alignment; in dmatest_func()
[all …]
/drivers/crypto/nx/
A Dnx-842.c188 if (adj_slen > slen || (u64)src % c->alignment) { in compress()
202 if ((u64)dst % c->alignment) { in compress()
203 dskip = (int)(PTR_ALIGN(dst, c->alignment) - dst); in compress()
289 (u64)p.in % c.alignment || in nx842_crypto_compress()
293 (u64)p.out % c.alignment); in nx842_crypto_compress()
374 if (slen < adj_slen || (u64)src % c->alignment) { in decompress()
390 if (dlen < required_len || (u64)dst % c->alignment) { in decompress()
/drivers/gpu/drm/v3d/
A Dv3d_mmu.c32 static bool v3d_mmu_is_aligned(u32 page, u32 page_address, size_t alignment) in v3d_mmu_is_aligned() argument
34 return IS_ALIGNED(page, alignment >> V3D_MMU_PAGE_SHIFT) && in v3d_mmu_is_aligned()
35 IS_ALIGNED(page_address, alignment >> V3D_MMU_PAGE_SHIFT); in v3d_mmu_is_aligned()
/drivers/gpu/drm/xe/
A Dxe_ggtt.c737 u64 alignment = bo->min_align > 0 ? bo->min_align : XE_PAGE_SIZE; in __xe_ggtt_insert_bo_at() local
742 alignment = SZ_64K; in __xe_ggtt_insert_bo_at()
765 xe_bo_size(bo), alignment, 0, start, end, 0); in __xe_ggtt_insert_bo_at()
840 u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare) in xe_ggtt_largest_hole() argument
852 hole_start = ALIGN(hole_start, alignment); in xe_ggtt_largest_hole()
853 hole_end = ALIGN_DOWN(hole_end, alignment); in xe_ggtt_largest_hole()
940 u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p) in xe_ggtt_print_holes() argument
953 hole_start = ALIGN(hole_start, alignment); in xe_ggtt_print_holes()
954 hole_end = ALIGN_DOWN(hole_end, alignment); in xe_ggtt_print_holes()
A Dxe_ggtt.h38 u64 xe_ggtt_largest_hole(struct xe_ggtt *ggtt, u64 alignment, u64 *spare);
41 u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_printer *p);
/drivers/gpu/drm/i915/gem/
A Di915_gem_stolen.h19 unsigned alignment);
22 unsigned alignment, u64 start,
/drivers/ps3/
A Dps3stor_lib.c138 int error, res, alignment; in ps3stor_setup() local
166 alignment = min(__ffs(dev->bounce_size), in ps3stor_setup()
168 if (alignment < 12) { in ps3stor_setup()
174 } else if (alignment < 16) in ps3stor_setup()
/drivers/scsi/pm8001/
A Dpm8001_init.c194 pm8001_ha->memoryMap.region[i].alignment), in pm8001_free()
350 pm8001_ha->memoryMap.region[AAP1].alignment = 32; in pm8001_alloc()
356 pm8001_ha->memoryMap.region[IOP].alignment = 32; in pm8001_alloc()
365 pm8001_ha->memoryMap.region[ci_offset+i].alignment = 4; in pm8001_alloc()
375 pm8001_ha->memoryMap.region[ib_offset+i].alignment in pm8001_alloc()
384 pm8001_ha->memoryMap.region[ib_offset+i].alignment = 64; in pm8001_alloc()
395 pm8001_ha->memoryMap.region[pi_offset+i].alignment = 4; in pm8001_alloc()
405 pm8001_ha->memoryMap.region[ob_offset+i].alignment in pm8001_alloc()
415 pm8001_ha->memoryMap.region[ob_offset+i].alignment = 64; in pm8001_alloc()
440 region->alignment) != 0) { in pm8001_alloc()
[all …]
/drivers/phy/starfive/
A Dphy-jh7110-dphy-tx.c236 unsigned long alignment = STF_DPHY_BITRATE_ALIGN; in stf_dphy_configure() local
241 if (bitrate % alignment) in stf_dphy_configure()
242 bitrate += alignment - (bitrate % alignment); in stf_dphy_configure()
/drivers/firmware/efi/libstub/
A Drelocate.c115 unsigned long alignment, in efi_relocate_kernel() argument
148 status = efi_low_alloc_above(alloc_size, alignment, &new_addr, in efi_relocate_kernel()
/drivers/clk/tegra/
A Dclk-dfll.c766 int vstep = td->soc->alignment.step_uv; in dfll_init_out_if()
805 align_step = dev_pm_opp_get_voltage(opp) / td->soc->alignment.step_uv; in find_lut_index_for_rate()
809 if ((td->lut_uv[i] / td->soc->alignment.step_uv) >= align_step) in find_lut_index_for_rate()
1591 align_step = uV / td->soc->alignment.step_uv; in find_vdd_map_entry_exact()
1598 reg_volt_id = reg_uV / td->soc->alignment.step_uv; in find_vdd_map_entry_exact()
1619 align_step = uV / td->soc->alignment.step_uv; in find_vdd_map_entry_min()
1626 reg_volt_id = reg_uV / td->soc->alignment.step_uv; in find_vdd_map_entry_min()
1851 if (!td->soc->alignment.step_uv || !td->soc->alignment.offset_uv) { in dfll_fetch_pwm_params()
1857 td->lut_uv[i] = td->soc->alignment.offset_uv + in dfll_fetch_pwm_params()
1858 i * td->soc->alignment.step_uv; in dfll_fetch_pwm_params()
/drivers/infiniband/hw/mlx5/
A Ddm.c13 u64 length, u32 alignment) in mlx5_cmd_alloc_memic() argument
33 mlx5_alignment = (alignment < MLX5_MEMIC_BASE_ALIGN) ? 0 : in mlx5_cmd_alloc_memic()
34 alignment - MLX5_MEMIC_BASE_ALIGN; in mlx5_cmd_alloc_memic()
302 dm->base.size, attr->alignment); in handle_alloc_dm_memic()
401 err = mlx5_dm_sw_icm_alloc(dev, icm_type, act_size, attr->alignment, in handle_alloc_dm_sw_icm()
436 type, attr->length, attr->alignment); in mlx5_ib_alloc_dm()

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