| /drivers/gpu/drm/amd/amdgpu/ |
| A D | jpeg_v1_0.c | 186 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_insert_start()
205 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_insert_end()
230 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
234 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
238 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
242 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
246 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
250 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
254 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
258 amdgpu_ring_write(ring, in jpeg_v1_0_decode_ring_emit_fence()
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| A D | jpeg_v2_0.c | 511 amdgpu_ring_write(ring, seq); in jpeg_v2_0_dec_ring_emit_fence()
515 amdgpu_ring_write(ring, seq); in jpeg_v2_0_dec_ring_emit_fence()
531 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_fence()
542 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_fence()
570 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_ib()
599 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_ib()
630 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_reg_wait()
631 amdgpu_ring_write(ring, in jpeg_v2_0_dec_ring_emit_reg_wait()
663 amdgpu_ring_write(ring, 0); in jpeg_v2_0_dec_ring_emit_wreg()
664 amdgpu_ring_write(ring, in jpeg_v2_0_dec_ring_emit_wreg()
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| A D | vcn_sw_ring.c | 33 amdgpu_ring_write(ring, addr); in vcn_dec_sw_ring_emit_fence()
35 amdgpu_ring_write(ring, seq); in vcn_dec_sw_ring_emit_fence()
41 amdgpu_ring_write(ring, VCN_DEC_SW_CMD_END); in vcn_dec_sw_ring_insert_end()
49 amdgpu_ring_write(ring, VCN_DEC_SW_CMD_IB); in vcn_dec_sw_ring_emit_ib()
50 amdgpu_ring_write(ring, vmid); in vcn_dec_sw_ring_emit_ib()
53 amdgpu_ring_write(ring, ib->length_dw); in vcn_dec_sw_ring_emit_ib()
60 amdgpu_ring_write(ring, reg << 2); in vcn_dec_sw_ring_emit_reg_wait()
61 amdgpu_ring_write(ring, mask); in vcn_dec_sw_ring_emit_reg_wait()
62 amdgpu_ring_write(ring, val); in vcn_dec_sw_ring_emit_reg_wait()
84 amdgpu_ring_write(ring, reg << 2); in vcn_dec_sw_ring_emit_wreg()
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| A D | uvd_v6_0.c | 484 amdgpu_ring_write(ring, tmp); in uvd_v6_0_hw_init()
488 amdgpu_ring_write(ring, tmp); in uvd_v6_0_hw_init()
492 amdgpu_ring_write(ring, tmp); in uvd_v6_0_hw_init()
497 amdgpu_ring_write(ring, 0x8); in uvd_v6_0_hw_init()
500 amdgpu_ring_write(ring, 3); in uvd_v6_0_hw_init()
935 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_fence()
938 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_fence()
940 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_fence()
942 amdgpu_ring_write(ring, 2); in uvd_v6_0_ring_emit_fence()
1083 amdgpu_ring_write(ring, 0); in uvd_v6_0_ring_emit_vm_flush()
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| A D | jpeg_v4_0_3.c | 744 amdgpu_ring_write(ring, in jpeg_v4_0_3_dec_ring_insert_start()
765 amdgpu_ring_write(ring, in jpeg_v4_0_3_dec_ring_insert_end()
809 amdgpu_ring_write(ring, 0); in jpeg_v4_0_3_dec_ring_emit_fence()
812 amdgpu_ring_write(ring, 0); in jpeg_v4_0_3_dec_ring_emit_fence()
815 amdgpu_ring_write(ring, 0); in jpeg_v4_0_3_dec_ring_emit_fence()
818 amdgpu_ring_write(ring, 0); in jpeg_v4_0_3_dec_ring_emit_fence()
842 amdgpu_ring_write(ring, 0); in jpeg_v4_0_3_dec_ring_emit_ib()
871 amdgpu_ring_write(ring, 0); in jpeg_v4_0_3_dec_ring_emit_ib()
908 amdgpu_ring_write(ring, 0); in jpeg_v4_0_3_dec_ring_emit_reg_wait()
909 amdgpu_ring_write(ring, in jpeg_v4_0_3_dec_ring_emit_reg_wait()
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| A D | uvd_v5_0.c | 172 amdgpu_ring_write(ring, tmp); in uvd_v5_0_hw_init()
176 amdgpu_ring_write(ring, tmp); in uvd_v5_0_hw_init()
180 amdgpu_ring_write(ring, tmp); in uvd_v5_0_hw_init()
185 amdgpu_ring_write(ring, 0x8); in uvd_v5_0_hw_init()
188 amdgpu_ring_write(ring, 3); in uvd_v5_0_hw_init()
498 amdgpu_ring_write(ring, seq); in uvd_v5_0_ring_emit_fence()
504 amdgpu_ring_write(ring, 0); in uvd_v5_0_ring_emit_fence()
507 amdgpu_ring_write(ring, 0); in uvd_v5_0_ring_emit_fence()
509 amdgpu_ring_write(ring, 0); in uvd_v5_0_ring_emit_fence()
511 amdgpu_ring_write(ring, 2); in uvd_v5_0_ring_emit_fence()
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| A D | uvd_v3_1.c | 116 amdgpu_ring_write(ring, seq); in uvd_v3_1_ring_emit_fence()
122 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_emit_fence()
125 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_emit_fence()
127 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_emit_fence()
129 amdgpu_ring_write(ring, 2); in uvd_v3_1_ring_emit_fence()
175 amdgpu_ring_write(ring, 0); in uvd_v3_1_ring_insert_nop()
661 amdgpu_ring_write(ring, tmp); in uvd_v3_1_hw_init()
665 amdgpu_ring_write(ring, tmp); in uvd_v3_1_hw_init()
669 amdgpu_ring_write(ring, tmp); in uvd_v3_1_hw_init()
674 amdgpu_ring_write(ring, 0x8); in uvd_v3_1_hw_init()
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| A D | uvd_v4_2.c | 175 amdgpu_ring_write(ring, tmp); in uvd_v4_2_hw_init()
179 amdgpu_ring_write(ring, tmp); in uvd_v4_2_hw_init()
183 amdgpu_ring_write(ring, tmp); in uvd_v4_2_hw_init()
188 amdgpu_ring_write(ring, 0x8); in uvd_v4_2_hw_init()
191 amdgpu_ring_write(ring, 3); in uvd_v4_2_hw_init()
483 amdgpu_ring_write(ring, seq); in uvd_v4_2_ring_emit_fence()
489 amdgpu_ring_write(ring, 0); in uvd_v4_2_ring_emit_fence()
492 amdgpu_ring_write(ring, 0); in uvd_v4_2_ring_emit_fence()
494 amdgpu_ring_write(ring, 0); in uvd_v4_2_ring_emit_fence()
496 amdgpu_ring_write(ring, 2); in uvd_v4_2_ring_emit_fence()
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| A D | uvd_v7_0.c | 1186 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1189 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1192 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1195 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1199 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1202 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1205 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_fence()
1262 amdgpu_ring_write(ring, in uvd_v7_0_ring_test_ring()
1327 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_ib()
1331 amdgpu_ring_write(ring, in uvd_v7_0_ring_emit_ib()
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| A D | amdgpu_vpe.c | 513 amdgpu_ring_write(ring, ib->length_dw); in vpe_ring_emit_ib()
537 amdgpu_ring_write(ring, 0); in vpe_ring_emit_fence()
554 amdgpu_ring_write(ring, addr & 0xfffffffc); in vpe_ring_emit_pipeline_sync()
567 amdgpu_ring_write(ring, reg << 2); in vpe_ring_emit_wreg()
568 amdgpu_ring_write(ring, val); in vpe_ring_emit_wreg()
580 amdgpu_ring_write(ring, reg << 2); in vpe_ring_emit_reg_wait()
581 amdgpu_ring_write(ring, 0); in vpe_ring_emit_reg_wait()
583 amdgpu_ring_write(ring, mask); /* mask */ in vpe_ring_emit_reg_wait()
602 amdgpu_ring_write(ring, 1); in vpe_ring_init_cond_exec()
604 amdgpu_ring_write(ring, 0); in vpe_ring_init_cond_exec()
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| A D | sdma_v2_4.c | 231 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v2_4_ring_insert_nop()
234 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v2_4_ring_insert_nop()
262 amdgpu_ring_write(ring, ib->length_dw); in sdma_v2_4_ring_emit_ib()
263 amdgpu_ring_write(ring, 0); in sdma_v2_4_ring_emit_ib()
264 amdgpu_ring_write(ring, 0); in sdma_v2_4_ring_emit_ib()
315 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v2_4_ring_emit_fence()
557 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v2_4_ring_test_ring()
796 amdgpu_ring_write(ring, 0); in sdma_v2_4_ring_emit_vm_flush()
798 amdgpu_ring_write(ring, 0); /* mask */ in sdma_v2_4_ring_emit_vm_flush()
808 amdgpu_ring_write(ring, reg); in sdma_v2_4_ring_emit_wreg()
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| A D | si_dma.c | 114 amdgpu_ring_write(ring, addr & 0xfffffffc); in si_dma_ring_emit_fence()
116 amdgpu_ring_write(ring, seq); in si_dma_ring_emit_fence()
121 amdgpu_ring_write(ring, addr & 0xfffffffc); in si_dma_ring_emit_fence()
123 amdgpu_ring_write(ring, upper_32_bits(seq)); in si_dma_ring_emit_fence()
232 amdgpu_ring_write(ring, 0xDEADBEEF); in si_dma_ring_test_ring()
437 amdgpu_ring_write(ring, lower_32_bits(addr)); in si_dma_ring_emit_pipeline_sync()
440 amdgpu_ring_write(ring, seq); /* value */ in si_dma_ring_emit_pipeline_sync()
463 amdgpu_ring_write(ring, 1 << vmid); /* mask */ in si_dma_ring_emit_vm_flush()
464 amdgpu_ring_write(ring, 0); /* value */ in si_dma_ring_emit_vm_flush()
472 amdgpu_ring_write(ring, (0xf << 16) | reg); in si_dma_ring_emit_wreg()
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| A D | cik_sdma.c | 206 amdgpu_ring_write(ring, ring->funcs->nop | in cik_sdma_ring_insert_nop()
209 amdgpu_ring_write(ring, ring->funcs->nop); in cik_sdma_ring_insert_nop()
236 amdgpu_ring_write(ring, ib->length_dw); in cik_sdma_ring_emit_ib()
286 amdgpu_ring_write(ring, lower_32_bits(seq)); in cik_sdma_ring_emit_fence()
625 amdgpu_ring_write(ring, 0xDEADBEEF); in cik_sdma_ring_test_ring()
832 amdgpu_ring_write(ring, addr & 0xfffffffc); in cik_sdma_ring_emit_pipeline_sync()
859 amdgpu_ring_write(ring, 0); in cik_sdma_ring_emit_vm_flush()
860 amdgpu_ring_write(ring, 0); /* reference */ in cik_sdma_ring_emit_vm_flush()
861 amdgpu_ring_write(ring, 0); /* mask */ in cik_sdma_ring_emit_vm_flush()
869 amdgpu_ring_write(ring, reg); in cik_sdma_ring_emit_wreg()
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| A D | gfx_v7_0.c | 2226 amdgpu_ring_write(ring, in gfx_v7_0_ring_emit_ib_gfx()
2260 amdgpu_ring_write(ring, in gfx_v7_0_ring_emit_ib_compute()
2286 amdgpu_ring_write(ring, 0); in gfx_v7_ring_emit_cntxcntl()
2497 amdgpu_ring_write(ring, in gfx_v7_0_cp_gfx_start()
2515 amdgpu_ring_write(ring, 0); in gfx_v7_0_cp_gfx_start()
3160 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_vm_flush()
3188 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_wreg()
3973 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_gds_switch()
3981 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_gds_switch()
3989 amdgpu_ring_write(ring, 0); in gfx_v7_0_ring_emit_gds_switch()
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| A D | sdma_v6_0.c | 152 amdgpu_ring_write(ring, 1); in sdma_v6_0_ring_init_cond_exec()
156 amdgpu_ring_write(ring, 0); in sdma_v6_0_ring_init_cond_exec()
950 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v6_0_ring_test_ring()
1209 amdgpu_ring_write(ring, in sdma_v6_0_ring_emit_vm_flush()
1214 amdgpu_ring_write(ring, req); in sdma_v6_0_ring_emit_vm_flush()
1215 amdgpu_ring_write(ring, 0xFFFFFFFF); in sdma_v6_0_ring_emit_vm_flush()
1216 amdgpu_ring_write(ring, in sdma_v6_0_ring_emit_vm_flush()
1226 amdgpu_ring_write(ring, reg); in sdma_v6_0_ring_emit_wreg()
1227 amdgpu_ring_write(ring, val); in sdma_v6_0_ring_emit_wreg()
1236 amdgpu_ring_write(ring, reg << 2); in sdma_v6_0_ring_emit_reg_wait()
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| A D | sdma_v3_0.c | 407 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v3_0_ring_insert_nop()
410 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v3_0_ring_insert_nop()
438 amdgpu_ring_write(ring, ib->length_dw); in sdma_v3_0_ring_emit_ib()
439 amdgpu_ring_write(ring, 0); in sdma_v3_0_ring_emit_ib()
440 amdgpu_ring_write(ring, 0); in sdma_v3_0_ring_emit_ib()
491 amdgpu_ring_write(ring, lower_32_bits(seq)); in sdma_v3_0_ring_emit_fence()
831 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v3_0_ring_test_ring()
1069 amdgpu_ring_write(ring, 0); in sdma_v3_0_ring_emit_vm_flush()
1071 amdgpu_ring_write(ring, 0); /* mask */ in sdma_v3_0_ring_emit_vm_flush()
1081 amdgpu_ring_write(ring, reg); in sdma_v3_0_ring_emit_wreg()
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| A D | sdma_v7_0.c | 152 amdgpu_ring_write(ring, 1); in sdma_v7_0_ring_init_cond_exec()
156 amdgpu_ring_write(ring, 0); in sdma_v7_0_ring_init_cond_exec()
252 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v7_0_ring_insert_nop()
255 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v7_0_ring_insert_nop()
291 amdgpu_ring_write(ring, ib->length_dw); in sdma_v7_0_ring_emit_ib()
967 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v7_0_ring_test_ring()
1228 amdgpu_ring_write(ring, reg << 2); in sdma_v7_0_ring_emit_wreg()
1229 amdgpu_ring_write(ring, val); in sdma_v7_0_ring_emit_wreg()
1238 amdgpu_ring_write(ring, reg << 2); in sdma_v7_0_ring_emit_reg_wait()
1239 amdgpu_ring_write(ring, 0); in sdma_v7_0_ring_emit_reg_wait()
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| A D | sdma_v5_2.c | 151 amdgpu_ring_write(ring, 1); in sdma_v5_2_ring_init_cond_exec()
155 amdgpu_ring_write(ring, 0); in sdma_v5_2_ring_init_cond_exec()
944 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v5_2_ring_test_ring()
1206 amdgpu_ring_write(ring, in sdma_v5_2_ring_emit_vm_flush()
1211 amdgpu_ring_write(ring, req); in sdma_v5_2_ring_emit_vm_flush()
1212 amdgpu_ring_write(ring, 0xFFFFFFFF); in sdma_v5_2_ring_emit_vm_flush()
1213 amdgpu_ring_write(ring, in sdma_v5_2_ring_emit_vm_flush()
1223 amdgpu_ring_write(ring, reg); in sdma_v5_2_ring_emit_wreg()
1224 amdgpu_ring_write(ring, val); in sdma_v5_2_ring_emit_wreg()
1233 amdgpu_ring_write(ring, reg << 2); in sdma_v5_2_ring_emit_reg_wait()
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| A D | vcn_v1_0.c | 1514 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_insert_start()
1517 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_insert_start()
1533 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_insert_end()
1555 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1558 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1561 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1564 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1568 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1571 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
1574 amdgpu_ring_write(ring, in vcn_v1_0_dec_ring_emit_fence()
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| A D | vcn_v2_0.c | 1487 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_insert_start()
1524 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_insert_nop()
1545 amdgpu_ring_write(ring, seq); in vcn_v2_0_dec_ring_emit_fence()
1557 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_emit_fence()
1560 amdgpu_ring_write(ring, 0); in vcn_v2_0_dec_ring_emit_fence()
1586 amdgpu_ring_write(ring, vmid); in vcn_v2_0_dec_ring_emit_ib()
1605 amdgpu_ring_write(ring, val); in vcn_v2_0_dec_ring_emit_reg_wait()
1639 amdgpu_ring_write(ring, val); in vcn_v2_0_dec_ring_emit_wreg()
1733 amdgpu_ring_write(ring, seq); in vcn_v2_0_enc_ring_emit_fence()
1772 amdgpu_ring_write(ring, val); in vcn_v2_0_enc_ring_emit_reg_wait()
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| A D | sdma_v5_0.c | 311 amdgpu_ring_write(ring, 1); in sdma_v5_0_ring_init_cond_exec()
315 amdgpu_ring_write(ring, 0); in sdma_v5_0_ring_init_cond_exec()
414 amdgpu_ring_write(ring, ring->funcs->nop | in sdma_v5_0_ring_insert_nop()
417 amdgpu_ring_write(ring, ring->funcs->nop); in sdma_v5_0_ring_insert_nop()
453 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_0_ring_emit_ib()
1044 amdgpu_ring_write(ring, 0xDEADBEEF); in sdma_v5_0_ring_test_ring()
1302 amdgpu_ring_write(ring, reg); in sdma_v5_0_ring_emit_wreg()
1303 amdgpu_ring_write(ring, val); in sdma_v5_0_ring_emit_wreg()
1312 amdgpu_ring_write(ring, reg << 2); in sdma_v5_0_ring_emit_reg_wait()
1313 amdgpu_ring_write(ring, 0); in sdma_v5_0_ring_emit_reg_wait()
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| A D | gfx_v8_0.c | 4157 amdgpu_ring_write(ring, in gfx_v8_0_cp_gfx_start()
4160 amdgpu_ring_write(ring, in gfx_v8_0_cp_gfx_start()
4177 amdgpu_ring_write(ring, 0); in gfx_v8_0_cp_gfx_start()
5123 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch()
5131 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch()
5139 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch()
5147 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_gds_switch()
6062 amdgpu_ring_write(ring, in gfx_v8_0_ring_emit_ib_gfx()
6096 amdgpu_ring_write(ring, in gfx_v8_0_ring_emit_ib_compute()
6174 amdgpu_ring_write(ring, 0); in gfx_v8_0_ring_emit_vm_flush()
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| A D | gfx_v6_0.c | 1833 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_fence()
1840 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_fence()
1864 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_ib()
1875 amdgpu_ring_write(ring, in gfx_v6_0_ring_emit_ib()
2021 amdgpu_ring_write(ring, 0); in gfx_v6_0_cp_gfx_start()
2022 amdgpu_ring_write(ring, 0); in gfx_v6_0_cp_gfx_start()
2044 amdgpu_ring_write(ring, in gfx_v6_0_cp_gfx_start()
2057 amdgpu_ring_write(ring, 0); in gfx_v6_0_cp_gfx_start()
2323 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_vm_flush()
2350 amdgpu_ring_write(ring, 0); in gfx_v6_0_ring_emit_wreg()
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| A D | gfx_v9_0.c | 937 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
941 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
943 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources()
973 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_map_queues()
994 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_unmap_queues()
1017 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_query_status()
1022 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_query_status()
1036 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_invalidate_tlbs()
1178 amdgpu_ring_write(ring, in gfx_v9_0_wait_reg_mem()
5438 amdgpu_ring_write(ring, in gfx_v9_0_ring_emit_ib_gfx()
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| A D | gfx_v11_0.c | 429 amdgpu_ring_write(kiq_ring, in gfx11_kiq_unmap_queues()
451 amdgpu_ring_write(kiq_ring, in gfx11_kiq_query_status()
516 amdgpu_ring_write(ring, reg); in gfx_v11_0_write_data_to_reg()
517 amdgpu_ring_write(ring, 0); in gfx_v11_0_write_data_to_reg()
518 amdgpu_ring_write(ring, val); in gfx_v11_0_write_data_to_reg()
527 amdgpu_ring_write(ring, in gfx_v11_0_wait_reg_mem()
3618 amdgpu_ring_write(ring, in gfx_v11_0_cp_gfx_start()
3639 amdgpu_ring_write(ring, 0); in gfx_v11_0_cp_gfx_start()
5867 amdgpu_ring_write(ring, in gfx_v11_0_ring_emit_ib_gfx()
5902 amdgpu_ring_write(ring, in gfx_v11_0_ring_emit_ib_compute()
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